Stop Mode - NEC mPD178054 Series User Manual

15.2.2 STOP mode

(1) STOP mode set and operating status
The STOP mode is set by executing the STOP instruction.
Cautions 1. When the STOP mode is set, the X1 pin is pulled down to GND, and the X2 pin is internally
pulled up to V
2. Because the interrupt request signal is used to clear the standby mode, if there is an
interrupt source with the interrupt request flag set and the interrupt mask flag reset, the
standby mode is immediately released if set. Thus, the STOP mode is reset to the HALT
mode immediately after execution of the STOP instruction. After the wait set using the
oscillation stabilization time select register (OSTS), the operation mode is set.
The operating status in the STOP mode is described below.
Item
Clock generator
CPU
Port
8-bit timer/event counter
Basic timer
Watchdog timer
Buzzer output controller
A/D converter
Serial interface
(SIO30 to SIO32)
External interrupt
PLL frequency synthesizer
Frequency counter
Power-on clear circuit
208
CHAPTER 15 STANDBY FUNCTION
to minimize the leakage current at the crystal oscillator block.
DD
Table 15-3. STOP Mode Operating Status
Can oscillate system clock. Stops clock supply to CPU.
Stops operating.
Holds status before HALT mode is set.
Operation stops and cannot operate.
Can operate.
Operation stops and cannot operate.
RESET generated when detecting 2.2 V or less.
User's Manual U15104EJ2V0UD
Status