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(4) PLL data transfer register (PLLNS)
This register transfers the values of the PLL data registers (PLLRL, PLLRH, and PLLR0) to the programmable
counter and swallow counter.
The value of this register is 00H after reset and in the STOP mode.
In the HALT mode, this register holds the previous value immediately before the HALT mode is set.
Figure 13-5. Format of PLL Data Transfer Register (PLLNS)
Symbol
7
6
5
PLLNS
0
0
0
PLLNS0
Transfers value of PLL data register to programmable counter and swallow counter
0
Does not transfer
1
Transfers
Remark Bits 1 to 7 are fixed to 0 by hardware.
184
CHAPTER 13 PLL FREQUENCY SYNTHESIZER
4
3
2
1
<0>
0
0
0
0
PLLNS0
User's Manual U15104EJ2V0UD
Address
After reset
R/W
FFA3H
00H
W
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