Machxo5-25 Clock Sources; Figure 5.1. Onboard Clock Resources; Table 5.1. Input Clock Options - Lattice Semiconductor MachXO5-NX User Manual

5. MachXO5-25 Clock Sources

The MachXO5-NX Development Board has multiple external clock options for the MachXO5-25 applications as shown in
Figure 5.1.

12 MHz from U1 (FTDI)

12 MHz from U18 (FTDI)

25 MHz from U7 (SGMII PHY)

27 MHz from X4 (OSC MEM)

125 MHz from X5 (OSC MEM)

External clock source from J10 (SMA)
X4
27M_OSC_OUT
125M_OSC_OUT
X5
SGMII_CLK_OUT
U7
You need take care that only 27 MHz and 125 MHz clocks are active in default after board power up. Both 12 MHz
clocks from the FT2232H FTDI U1 and U18 device are not always on without some hardware configuration. 25 MHz of
SGMII and external clock need source from other devices. Refer to Table 5.1 for those clock utilization and enable
conditions.

Table 5.1. Input Clock Options

Clock
Net Name
Frequency
12 MHz 12MHZ
12 MHz U12MHZ
25 MHz SGMII_CLK_OUT
27 MHz 27M_OSC
125 MHz 125M_OSC
Customer EXT_CLK
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All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02052-0.90
EXPCON_OSC
12MHz
R159
U12MHz

Figure 5.1. Onboard Clock Resources

MachXO5-25 Clock Always
Ball Location Source On?
E16 U1 No
E14 U18 No
T7 U7 No
B1 X4 Yes
V1 X5 Yes
D19 J10 No
MachXO5-NX Development Board
Preliminary Evaluation Board User Guide
J8
U1
JP11
U18
JP10
EXT_CLK
J10
Enable Conditions
Need add R159 and JP11. USB header J11 connected
with power on.
Need add JP10. USB header J19 connected with
power on.
Power on. U7 populated and enabled.
Power on. Force 27M_EN high if R161 populated.
Power on. Force 125M_EN high if R232 populated.
Need add J10. Connect to external clock generator
through SMA cable.
J11
USB
J19
USB
Clock
SMA
Generator
17