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Other Test Points; Table 8.16. Test Point Connections - Lattice Semiconductor MachXO5-NX User Manual
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MachXO5-NX Development Board
Preliminary Evaluation Board User Guide
8.10.Other Test Points
The MachXO5-NX Development Board provides some test points for user flexibility.
Table 8.16. Test Point Connections
Test Point
TP1
TP2
© 2022 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
32
Net Name
PMU_WAKEUPN
TP2
MachXO5-25 Ball Location
G17
K18
FPGA-EB-02052-0.90
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