Status Byte Register - Chroma 63200 Series Operation & Programming Manual

High Power DC Electronic Load 63200 Series Operation & Programming Manual
Reading of the Standard Event Status register will reset it to zero.
The Standard Event Enable register can be programmed to specify the standard event bit
that is logically ORed to become Bit 5 (ESB bit) in the Status Byte register.
Mnemonic Bit Value
0
OPC
QYE 2
DDE 3
EXE 4 16
CME 5 32
8.6

Status Byte Register

The Status Byte register summarizes all of the status events from all status registers.
Table 8-3 describes the status events that are applied to the electronic load.
The Status Byte register can be read with a serial pull or *STB? query.
The RQS bit is the only bit that is automatically cleared after a serial pull.
When the Status Byte register is read with a *STB? query, Bit 6 of the Status Byte
register will contain the MSS bit. The MSS bit indicates that the load has at least one
reason for requesting service. *STB? does not affect the status byte.
The Status Byte register is cleared by *CLS command.
Mnemonic Bit Value
2
CSUM
QUES 3
MAV 4
ESB 5
RQS/MSS 6
8-4
Operation Complete. This event bit generated is responding to the
1 *OPC command. It indicates that the device has completed all
selected pending operations.
Query Error. The output queue was read when no data were
4
present or the data in the queue were lost.
8 Device Dependent Error. Memory was lost, or self-test failed.
Execution Error. A command parameter was outside the legal
range or inconsistent with the electronic load's operation, or the
command could not be executed due to some operating condition.
Command Error. A syntax or semantic error has occurred, or the
electronic load has received a <GET> within a program message.
Table 8-2 Bit Description of Standard Event Status
Channel Summary. It indicates if an enabled channel event
4 has occurred. It is affected by Channel Condition, Channel
Event and Channel Summary Event registers.
Questionable. It indicates if an enabled questionable event has
8
occurred.
Message Available. It indicates if the Output Queue contains
16
data.
Event Status Bit. It indicates if an enabled standard event has
32
occurred.
Request Service/Master Summary Status. During a serial pull,
64 RQS is returned and cleared. For an *STB? query, MSS is
returned without being cleared.
Table 8-3 Bit Description of Status Byte
Meaning
Meaning