Questionable Status - Chroma 63200 Series Operation & Programming Manual

High power dc electronic load
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High Power DC Electronic Load 63200 Series Operation & Programming Manual
OC
0
OV
1
OP
2
RV
3
OT
4
N.U. 5-15
STANDARD EVENT STATUS
EVENT
OPC
0
N.U.
1
QYE
2
DDE
3
EXE
4
CME
5
6
N.U.
7
N.U.
8.3

Questionable Status

The Questionable Status registers inform you one or more questionable status conditions,
which indicate certain errors or faults have occurred. Table 8-1 lists the questionable
status conditions that are applied to the electronic load.
When the corresponding bit of Questionable Status Condition register is set, it indicates
the condition is true.
Program the PTR/NTR filter to select the way of condition transition in the Questionable
Status Condition register will be set in the Event registers.
Reading of the Questionable Status Event register will reset it to zero.
The Questionable status Enable register can be programmed to specify the questionable
status event bit that is logically ORed to become Bit 3 (QUES bit) in the Status Byte
register.
Mnemonic Bit Value
0
OC
OV
1
8-2
QUESTIONABLE STATUS
CONDITION
PTR/NTR
EVENT
1
1
1
2
2
2
4
4
4
8
8
8
16
16
16
ENABLE
1
1
4
4
8
8
16
16
32
32
Figure 8-1 The Status Registers of Electronic Load
Over current. When an over current condition has occurred on a
1
channel, Bit 0 is set and remains set until the over current
condition is removed and LOAD:PROT:CLE is programmed.
Over voltage. When an over voltage condition has occurred on a
2
channel, Bit 1 is set and remains set until the over voltage
condition is removed and LOAD:PROT:CLE is programmed.
ENABLE
1
2
4
8
16
OUTPUT QUEUE
256 BYTE
DATA
N.U.
DATA
N.U.
DATA
N.U.
QUES
MAV
ESB
MSS
N.U.
Meaning
SERVICE
REQUEST
GENERATION
SERVICE
STATUS
REQUEST
BYTE
GENERATION
0
1
4
4
2
8
8
16
16
4
32
32
5
64
6
128
128
7

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