Measurement Computing Data Translation DT3034 User Manual page 173

Index
C/T 97
D/A output 88
external clock divider
maximum 119
minimum 119
external digital trigger
analog input 80
analog output
external negative digital trigger
external positive digital trigger
externally-retriggered scan mode
F
factory service 139
falling-edge gate
features 16
analog input 71
analog output
counter/timer
digital I/O 94
formatting data
analog input 85
analog output
frequency
base clock 119
external A/D sample clock
external C/T clock
internal A/D clock
internal A/D sample clock
internal C/T clock
internal D/A output clock
internal retrigger clock
frequency measurement
G
gain
actual available
analog input 74
analog output
number of 116
programmable
gate type 98
falling edge 98
high-edge 120
high-level 120
internal 120
logic-high level
logic-low level
low-edge 120
172
89
118
118
78
98
87
96
92
75
97
119
,
75 119
,
97 119
88
,
77 114
, ,
52 54 102
116
88
116
98
98
low-level 120
none (software) 98
rising edge 98
generating continuous pulses
H
help, online 59
,
high-edge gate type 98
high-level gate type 120
high-to-low pulse output
Host Block Overflow error
,
hysteresis 80 90
I
inhibiting data from channels
inprocess buffers 114
input configuration
differential analog 45
pseudo-differential analog
single-ended analog 45
Input FIFO Overflow error
input ranges 74
inserting the board 29
internal clock 119
A/D sample 75
C/T 97
cascaded C/T 97
D/A output 88
internal gate type 120
internal retrigger clock 77
J
J1 connector pin assignments
DT740 screw terminal panel
J2 connector pin assignments
DT740 screw terminal panel
jumper W1
DT740 36
L
LabVIEW 18
layout
DT740 36
level gate type
high 98
low 98
,
lines, digital I/O 72 94
103
120
99
86
72
45
86
154
,
43 158
156
,
44 159