Index
C/T subsystem
specifications
148
cables
EP307
19
EP308
19
cabling information
calibrating the board
analog input subsystem
analog output subsystem
running the utility
cascading counters
externally
56
CGLDepth
115
channel list
analog input
72
analog output
channel type
,
differential
71
pseudo-differential
single-ended
71
channel-gain list
depth
115
Channel-Gain List FIFO
channel-list inhibit
channels
analog input
71
analog output
counter/timer
digital I/O
94
number of
115
circular buffer
90
clock sources
external A/D sample clock
external C/T clock
external D/A output clock
internal A/D sample clock
internal C/T clock
internal D/A output clock
internal retrigger clock
internally cascaded C/T clock
clocks
base frequency
external
119
internal
119
maximum external clock divider
maximum throughput
minimum external clock divider
minimum throughput
common ground sense
DT740
36
configuring the DT740 screw terminal panel
170
96
168
18
125
130
127
,
97
120
88
115
71
,
115
72
72
115
87
96
,
92
75
97
88
75
97
88
77
97
119
119
119
119
119
connecting signals
analog outputs
counter/timer signals
current loop analog inputs
differential analog inputs
digital I/O signals
event counting signals
externally cascaded counter/timers
pseudo-differential analog inputs
pulse output signals
single-ended analog inputs
connector J1 pin assignments
DT740 screw terminal panel
connector J2 pin assignments
DT740 screw terminal panel
connector specifications
continuous analog input
about-trigger
continuously-paced scan mode
externally-retriggered scan mode
post-trigger
pre-trigger
113
software-retriggered scan mode
continuous analog output
continuously-paced analog output
waveform generation mode
continuous counter/timer
continuous digital input
continuous operations
about-trigger analog input
counter/timer
post-trigger analog input
pre-trigger analog input
conversion modes
continuous analog output
continuously-paced scan mode
dynamic digital output
externally-retriggered scan mode
single-value analog input
single-value analog output
software-retriggered scan mode
conversion rate
counter/timer
C/T clock sources
cascading
120
cascading internally
channels
115
clock sources
duty cycle
99
event counting
36
gate types
98
50
52
49
46
51
,
52
54
56
46
55
45
154
,
43
158
156
,
44
159
150
113
76
78
113
77
113
90
91
113
113
84
103
81
82
76
90
76
95
78
76
90
77
,
,
76
77
78
96
96
97
119
120
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