Sfp Module Connector - Xilinx ML605 User Manual

References
See the following websites for more Virtex-6 FPGA Integrated Endpoint Block for PCI
Express information:
•
•
In addition, see the PCI Express specifications for more information.

10. SFP Module Connector

The board contains a small form-factor pluggable (SFP) connector and cage assembly that
accepts SFP modules. The SFP interface is connected to MGT Bank 116 on the FPGA. The
SFP module serial ID interface is connected to the "SFP" IIC bus (see
for more information). The control and status signals for the SFP module are connected to
jumpers and test points as described in
in
Table 1-9: SFP Module Control and Status
ML605 Hardware User Guide
UG534 (v1.2.1) January 21, 2010
http://www.xilinx.com/products/ipcenter/V6_PCI_Express_Block.htm
http://www.xilinx.com/support/documentation/ipbusinterfacei-o_pci-
express_v6pciexpressendpointblock.htm
Table 1-10, page 36.
SFP Control/Status
Signal
Test Point J52
SFP_TX_FAULT High = Fault
Low = Normal Operation
Jumper J65
SFP_TX_DISABLE Off = SFP Disabled
On = SFP Enabled
Test Point J53
SFP_MOD_DETECT High = Module Not Present
Low = Module Present
Jumper J54
SFP_RT_SEL Jumper Pins 1-2 = Full Bandwidth
Jumper Pins 2-3 = Reduced Bandwidth
Test Point J51
SFP_LOS High = Loss of Receiver Signal
Low = Normal Operation
www.xilinx.com
Table 1-9. The SFP module connections are shown
Board Connection
Detailed Description
[Ref 27]
"15. IIC Bus," page 42
35