16-Bit Timer / Counter Mode - Abov MC80F0304 User Manual

MC80F0304/08/16
TDR1 enable
disable
clear & start
stop
TIME
Timer 1 (T1IF)
Interrupt Occur interrupt Occur interrupt
T1ST Start & Stop T1ST = 1
T1CN T1ST = 0
Control count T1CN = 0 T1CN = 1
Figure 13-8 Count Operation of Timer / Event counter

13.2 16-bit Timer / Counter Mode

The Timer register is being run with all 16 bits. A 16-bit timer/ 0000 H . The match output generates Timer 2 interrupt.
matches TDR0, TDR1 and then resets to 0000 counter register T0, T1 are incremented from 0000 . The match out- H until it H The clock source of the Timer 2 is selected either internal or ex-
put generates Timer 0 interrupt. T3CK[1:0] and 16BIT of TM3 should be set to "1" respectively ternal clock by bit T2CK[2:0]. In 16-bit mode, the bits
The clock source of the Timer 0 is selected either internal or ex- as shown in Figure 13-10 .
ternal clock by bit T0CK[2:0]. In 16-bit mode, the bits T1CK[1:0] and 16BIT of TM1 should be set to "1" respectively Even if the Timer 0 (including Timer 1) is used as a 16-bit timer,
as shown in Figure 13-9 . the Timer 2 and Timer 3 can still be used as either two 8-bit timer
Likewise, A 16-bit timer/counter register T2, T3 are incremented Timer 2 (including Timer 3) is used as a 16-bit timer, the Timer or one 16-bit timer by setting the TM3. Reversely, even if the
from 0000 H until it matches TDR2, TDR3 and then resets to 0 and Timer 1 can still be used as 8-bit timer independently.
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