Abov MC97F2664 Manuals

Manuals and User Guides for Abov MC97F2664. We have 1 Abov MC97F2664 manual available for free PDF download: User Manual

Abov MC97F2664 User Manual

Abov MC97F2664 User Manual (259 pages)

8-BIT MICROCONTROLLERS

Brand: Abov | Category: Microcontrollers | Size: 4 MB

Table of Contents

Table of Contents
3
1 Overview

10
2 Block Diagram

15
- Figure 2.1 Block Diagram
  15
3 Pin Assignment

16
4 Package Diagram

20
5 Pin Description

24
- Table 5-1 Normal Pin Description
  24
6 Port Structures

29
7 Electrical Characteristics

31
8 Memory

52
- Program Memory
  52
- Figure 8.1 Program Memory
  53
- Data Memory
  54
- Figure 8.2 Data Memory Map
  54
- Figure 8.3 Lower 128 Bytes RAM
  55
- XRAM Memory
  56
- Figure 8.4 XDATA Memory Area
  56
- SFR Map
  57
- Table 8-1 SFR Map Summary
  57
- Table 8-2 Extended SFR Map Summary
  58
- Table 8-3 SFR Map
  59
- Table 8-4 Extended SFR Map
  63
9 I/O Ports

70
- Port Register
  70
- Table 9-1 Port Register Map
  71
- P0 Port
  73
- P1 Port
  75
- P2 Port
  78
- P3 Port
  81
- P4 Port
  84
- P5 Port
  86
- P6 Port
  88
- P7 Port
  90
10 Interrupt Controller

92
11 Peripheral Hardware

112
12 Power down Operation

224
13 Reset

229
- Overview
  229
- Reset Source
  229
- RESET Block Diagram
  229
- Figure 13.1 RESET Block Diagram
  229
- Table 13-1 Reset State
  229
- RESET Noise Canceller
  230
- Power on RESET
  230
- Figure 13.2 Reset Noise Canceller Timer Diagram
  230
- Figure 13.3 Fast VDD Rising Time
  230
- Figure 13.4 Internal RESET Release Timing on Power-Up
  230
- Figure 13.5 Configuration Timing When Power-On
  231
- Figure 13.6 Boot Process Waveform
  231
- Table 13-2 Boot Process Description
  232
- External RESETB Input
  233
- Figure 13.7 Timing Diagram after RESET
  233
- Figure 13.8 Oscillator Generating Waveform Example
  233
- Brown out Detector Processor
  234
- Figure 13.9 Block Diagram of BOD
  234
- Figure 13.10 Internal Reset at the Power Fail Situation
  234
- LVI Block Diagram
  235
- Figure 13.11 Configuration Timing When BOD RESET
  235
- Figure 13.12 LVI Diagram
  235
- Table 13-3 Reset Operation Register Map
  236
14 On-Chip Debug System

239
15 Flash Memory

245
- Overview
  245
- Figure 15.1 Flash Program ROM Structure
  246
- Table 15-1 Flash Memory Register Map
  247
16 Configure Option

256
- Configure Option Control
  256
17 Appendix

257

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