Stop Mode - Abov MC80F0304 User Manual

.
Oscillator
(X pin)
IN
Internal Clock
External Interrupt
Oscillator
(X pin)
IN
CPU
Clock
RESET
Internal
RESET
SLEEP Instruction
Execution
Normal Operation

19.2 Stop Mode

In the Stop mode, the main oscillator, system clock and peripher-
al clock is stopped, but RC-oscillated watchdog timer continue to
operate. With the clock frozen, all functions are stopped, but the
on-chip RAM and Control registers are held. The port pins out the
values held by their respective port data register, port direction
registers. Oscillator stops and the systems internal operations are
all held up.
• The states of the RAM, registers, and latches valid
immediately before the system is put in the STOP
state are all held.
• The program counter stop the address of the
instruction to be executed after the instruction
"STOP" which starts the STOP operating mode.
November 4, 2011 Ver 2.12
SLEEP Instruction
Executed
Normal Operation SLEEP Operation
Figure 19-2 SLEEP Mode Release Timing by External Interrupt
SLEEP Operation
Figure 19-3 Timing of SLEEP Mode Release by Reset
Normal Operation
Stabilization Time
t = 65.5mS @4MHz
ST
Note:
The Stop mode is activated by execution of STOP instruc-
tion after setting the SSCR to "5A
ten by byte operation. If this register is set by bit manipulation
instruction, for example "set1" or "clr1" instruction, it may be undes-
ired operation)
In the Stop mode of operation, V
power consumption. Care must be taken, however, to ensure that
V is not reduced before the Stop mode is invoked, and that
DD
V is restored to its normal operating level, before the Stop
DD
mode is terminated.
The reset should not be activated before V
normal operating level, and must be held active long enough to
allow the oscillator to restart and stabilize.
MC80F0304/08/16
Normal Operation
". (This register should be writ-
H
can be reduced to minimize
DD
is restored to its
DD
103