Data Memory - Abov MC80F0304 User Manual

MC80F0304/08/16

8.3 Data Memory

Figure 8-8 shows the internal Data Memory space available. fore these registers contain control and status bits for the interrupt
Data Memory is divided into three groups, a user RAM, control system, the timer/ counters, analog to digital converters and I/O
registers, and Stack memory. ports. The control registers are in address range of 0C0 to 0FF H . H
Note that unoccupied addresses may not be implemented on the
0000 H chip. Read accesses to these addresses will in general return ran- dom data, and write accesses will have an indeterminate effect.
User Memory More detailed informations of each register are explained in each
(192Bytes) peripheral section.
00BF H PAGE0
00C0 H Control (When "G-flag=0", this page0 is selected) Note: Write only registers can not be accessed by bit ma- nipulation instruction. Do not use read-modify-write instruc-
00FF 0100 H Registers tion. Use byte manipulation instruction, for example "LDM".
H User Memory PAGE1
01FF H Stack Area Example; To write at CKCTLR
0200 H LDM CKCTLR,#0AH ;Divide ratio(÷32)
User Memory PAGE2
(64Bytes) Stack Area
023F H The stack provides the area where the return address is saved be-
fore a jump is performed during the processing routine at the ex-
Figure 8-8 Data Memory Map ecution of a subroutine call instruction or the acceptance of an
interrupt.
User Memory When returning from the processing routine, executing the sub- routine return instruction [RET] restores the contents of the pro-
The MC80F0304/0308/0316 has 512 × 8 bits for the user memory gram counter from the stack; executing the interrupt return
(RAM). RAM pages are selected by RPR (See Figure 8-9 ). instruction [RETI] restores the contents of the program counter
Note: After setting RPR(RAM Page Select Register), be and flags.
sure to execute SETG instruction. When executing CLRG stack pointed (SP). The SP is automatically decreased after the The save/restore locations in the stack are determined by the
instruction, be selected PAGE0 regardless of RPR. saving, and increased before the restoring. This means the value
of the SP indicates the stack location number for the next save.
Control Registers Refer to Figure 8-4 on page 34.
The control registers are used by the CPU and Peripheral function
blocks for controlling the desired operation of the device. There-
7 6 5 4 3 R/W 2 R/W 1 R/W 0
RPR - - - - - - RPR2 RPR1 RPR0 ADDRESS: 0E1 INITIAL VALUE: ---- -000 H B
000 : PAGE0 System clock source select
010 : PAGE2 001 : PAGE1
100 : Not used 011 : Not used
others : Setting prohibited
Figure 8-9 RPR(RAM Page Select Register)
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