Relationship Between Main Clock And Baud Rate - Abov MC80F0304 User Manual

MC80F0304/08/16
rupt request.
1. Stop bit Length : 1 bit
TxD
RxD
TX
INTERRUPT
RX
INTERRUPT
2. Stop bit Length : 2 bit
TxD
RxD
TX
INTERRUPT
RX
INTERRUPT
3. Stop bit Length : 1 bit, No parity
TxD
RxD
TX
INTERRUPT
RX
INTERRUPT
1 data frame consists of following bits.
- Start bit : 1 bit
- Character bits : 8 bits
- Parity bit : Even parity, Odd parity, Zero parity, No parity
- Stop bit(s) : 1 bit or 2 bits

16.4 Relationship between main clock and baud rate

The transmit/receive clock that is used to generate the baud rate
is obtained by dividing the main system clock. Transmit/Receive
90
1 data frame
Start D0 D1 D2 D3
character bits
1 data frame
Start D0 D1 D2 D3
character bits
1 data frame
Start
D0 D1 D2 D3
character bits
Figure 16-6 UART data format and interrupt timing diagram
D4 D5 D6 D7 Parity Stop
D4 D5 D6 D7 Parity
Stop
D4 D5 D6 D7
clock generation for baud rate is made by using main system
clock which is divided. The baud rate generated from the main
Stop
November 4, 2011 Ver 2.12