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5-4
Common Commands
a
Bit
7
6
5
4
3
2
1
0
a. High enables the event status register bit.
Query Response
Example
*ESR?
Description
Bit Weight
128
64
32
16
8
4
2
1
<integer> is a mask from 0 to 255.
OUTPUT 720;"*ESE 32"
In this example, the *ESE 32 command enables CME
(event summary bit) bit 5 of the event status enable
register. Therefore, when an incorrect programming
command is received, the CME (command error bit) in
the status byte register is set.
The *ESR (event status register) query returns the
value of the event status register.
When you read the standard event status register, the
value returned is the total of the bit weights of all of the
bits that are set to one at the time you read the byte.
The following table shows each bit in the event status
register and its bit weight. The register is cleared when
it is read.
Enables
PON – Power On
Not Used
CME – Command Error
EXE – Execution Error
DDE – Device Dependent Error
QYE – Query Error
Not Used
OPC – Operation Complete
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