Table of Contents
Advertisement
Handling SRQ and the IEEE488.2 Status Structures
Definitions of
We will start this discussion with a short explanation of the various elements comprising
the Status Structures.
structural
elements
Status registers
The status registers are collections of bits (usually 8) that depict the current state of
elements within the XMP 2600 system. Each bit reflects the actual state of a feature or
sub-assembly. When the state of the feature or sub-assembly changes so does the value of
the status bit.
For example, lets look at the STBY bit (bit 0) of the Output Status Register of a Power
Module. This bit will always reflect the state of the output of the Power Module: when
the Power Module's output is in standby (i.e. the output is disabled and no voltage is
coming out of its connector) the bit value will be 1. When the Power Module's output is
enabled, the bit value will be 0.
Event registers
Event registers indicate changes in the status of features or sub-assemblies. Note that in
contrast to the status registers, event bits remain set (having a value of 1) even if the
status changes back. The event indication will be cleared when the controlling computer
reads the event register.
For example, the FLT bit (bit 2) of the Event Register of a Power Module will be set
when a fault occurs (individual faults are indicated by the bits of the Faults Register).
When the fault condition is removed (e.g. an Over Temperature condition is no longer
valid) the corresponding Faults Register bit will be cleared but the FLT bit of the Event
Register will remain set.
When the computer reads the Event Register, the FLT bit is cleared even if the actual
fault condition is still true (as will be depicted by the Faults Register). The FLT bit will
be set again when a new fault condition occurs.
Event enable registers
As mentioned in the introduction, each status structure is summarized to a single bit that
is then used in the next level of status (or event) registers.
The Event Enable Register determines the way data is being summarized. The process is
fairly simple: the Event Register is ANDed with the Event Enable Register and if the
result has any set bits then the summary bit is set.
Mask registers
Some of the Status Structures of the XMP 2600 include (fixed or programmable) Mask
Registers. These registers determine which status changes will be registered as events.
For example, only positive Primary Status changes (i.e. a change from non-existing to
existing) are recorded in the Primary Event Register.
The Status Structure of the Power Modules include a programmable event filtering
mechanism that enables filtering of either positive or negative transitions of warning
conditions.
12
The status reporting mechanisms of the XMP 2600 are rather complex. If
you do not intend to use the advanced warnings and protection features of
the XMP 2600 you may choose to disregard most of the reported status
with the exception of the main status byte and the error code registers.
XMP 2600 Programming Manual
Usage Guidelines
rev. 1.1
Advertisement
Table of Contents
