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LCD Display
A.002 PID fbk sel
PID feedback selector
A.003 PID digital ref
PID digital reference
A.004 PID activat mode
PID active in steady state only
A.005 PID-Encoder sync
Enabling of encoder / PID synchronism
A.006 PID err sign rev
Error sign reversal
A.007 PIDInteg init en
Integral term initialization at start
A.008 PID update time
PID updating time
A.050 PID Prop gain 1
Proportional term gain 1
A.051 PID Int tconst 1
Integral action time 1
A.052 PID Deriv gain 1
Derivative action time 1
A.053 PID Prop gain 2
Proportional term gain 2
A.054 PID Int tconst 2
Integral action time 2
A.055 PID Deriv gain 2
Derivative action time 2
A.056 PID high limit
PID output upper limit
A.057 PID low limit
PID output lower limit
A.058 PID max pos err
PID max. positive error
PID max. negative error
A.059 PID min neg err
A.080 Cont close delay
RUN contactor close delay
A.081 Magnet time
Motor magnetization time
A.082 Brake open delay
Brake contactor open delay
A.083 Smooth start dly
Smooth start duration
A.084 DCBrake stp time
Duration of 0Hz braking at stop
A.085 Brake close dly
Brake contactor close delay
A.086 Cont open delay
RUN contactor open delay
A.087 Current pres thr
Current threshold for inverter output phases check
A.088 Sel match code
Code to be compared to the status of Freq selectors
A.090 Car max speed
Speed of the lift car when the inverter output frequency is equal
to P.062
A.091 Ramp factor 1
multiplier for acc/dec and jerks of ramp sets 1 and 3
A.092 Ramp factor 2
multiplier for acc/dec and jerks of ramp sets 2 and 4
A.220 Lift stop mode
Lift behavior at stop
A.300 AND1 In 1 src
Source of In 1 of logic block AND1
A.301 AND1 In 2 src
Source of In 2 of logic block AND1
A.302 AND2 In 1 src
Source of In 1 of logic block AND2
A.303 AND2 In 2 src
Source of In 2 of logic block AND2
A.304 AND3 In 1 src
Source of In 1 of logic block AND3
A.305 AND3 In 2 src
Source of In 2 of logic block AND3
A.306 OR1 In 1 src
Source of In 1 of logic block OR1
A.307 OR1 In 2 src
Source of In 2 of logic block OR1
A.308 OR2 In 1 src
Source of In 1 of logic block OR2
A.309 OR2 In 2 src
Source of In 2 of logic block OR2
A.310 OR3 In 1 src
Source of In 1 of logic block OR3
A.311 OR3 In 2 src
Source of In 2 of logic block OR3
A.312 NOT1 In src
Source of Input of logic block NOT1
A.313 NOT2 In src
Source of Input of logic block NOT2
A.314 NOT3 In src
Source of Input of logic block NOT3
A.315 NOT4 In src
Source of Input of logic block NOT4
AGy -L
PARAMETER
DESCRIPTION
PICK LIST
LCD Selection
Description
[2] Analog inp 2
Analog input 2
[3] Analog inp 3
Analog input 3
[4] Frequency ref
Frequency reference
[5] Ramp output
Ramp output
[6] Digital ref
Internal reference
[7] Encoder freq
Encoder frequency
[0] Null
Null
[1] Analog inp 1
Analog input 1
[2] Analog inp 2
Analog input 2
[3] Analog inp 3
Analog input 3
[4] Encoder freq
Encoder frequency
[5] Output curr
Output peak current
[6] Output torque
Output torque
[7] Output power
Output power
[0] Always
[1] Steady state
[0] Disable
[1] Enable
[0] Disable
[1] Enable
[0] Disable
[1] Enable
[0] Dcb at stop
DC brake is performed after the
output frequency is below P.440
threshold
[1] Normal stop
DC brake is not performed at
stop
see list of I.000
see list of I.000
see list of I.000
see list of I.000
see list of I.000
see list of I.000
see list of I.000
see list of I.000
see list of I.000
see list of I.000
see list of I.000
see list of I.000
see list of I.000
see list of I.000
see list of I.000
see list of I.000
0
0
7
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-100
100
%
0.1
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1
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1
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1
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1
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2.5
sec
0.01
0
0
99.99
0.01
99.99
0
99.99
0.01
0
0
99.99
0.01
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99.99
0.01
99.99
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99.99
0.01
0
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99.99
0.01
100
-100
100
%
0.1
-100
-100
100
%
0.1
5
0.1
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%
0.1
5
0.1
100
%
0.1
0.20
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s
0.01
1
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0.20
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0
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1
0
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s
0.01
0.20
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10
s
0.01
0.20
0
10
s
0.01
10
0
100
%
1
0
0
15
0.50
0.01
5.00
m/s
0.01
1.00
0.01
2.50
0.01
1.00
0.01
2.50
0.01
1
0
1
0
0
25
0
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25
0
0
25
0
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0
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0
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25
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25
0
0
25
0
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25
0
0
25
0
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25
IPA
1202
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