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114 Appendix C: Matrox 4Sight GPm (Ivy Bridge) BIOS reference
Item
Options
AdjacentCacheLine Prefetch
Disabled
Enabled*
Max CPUID Value Limit
Disabled*
Enabled
C-States
Disabled
Enabled*
Enhanced C-States
Disabled
Enabled*
Enable C3
Disabled
Enabled*
Enable C6
Disabled
Enabled*
Enable C7
Disabled
Enabled*
Enable C7s
Disabled*
Enabled
Enable C7r
Disabled*
Enabled
Meaning
This item allows you to enable or disable the adjacent cache line prefetch option of the processor. When set
to Enabled, the CPU will fetch two adjacent cache lines (each cache line is 64 bytes) when updating the
cache, rather than fetching a single cache line. Like the Hardware Prefetcher item above, the adjacent cache
line prefetch option works transparently, without programmer intervention. When set to Disabled, this item
can reduce bus traffic.
Note that this item should not be changed.
❖
This item allows you to enable or disable the maximum CPUID value limit. Older operating systems (such as
Microsoft Windows 95/98/ME) do not support the values returned by CPUID instructions of newer
processors. This item can be used to limit the value returned by the CPUID instruction to 03h, so that older
operating systems work with newer CPUs.
Note that this item should not be changed.
❖
This item allows you to enable or disable processor idle power-saving states (C-states). Your unit falls into
C-states whenever it sleeps or hibernates.
The higher the C-state, the more power-saving capabilities; however, the higher the C-state, the more time
that is required to enter and exit that state.
This item allows you to enable or disable enhanced C-states.
This item allows you to enable or disable the C3 power-saving state. The C3 power-saving state causes the
CPU cores to flush their L1 instruction cache, L1 data cache, and L2 cache to the L3 shared cache. Clocks
are then shut off on each CPU core.
This item allows you to enable or disable the C6 power-saving state. The C6 power-saving state causes the
CPU cores to save their architectural state (such as, the contents of various control and general purpose
registers) before their power is turned off.
This item allows you to enable or disable the C7 power-saving state. The C7 power-saving state is similar to
the C6 state, with the addition of the level 3 cache being flushed progressively when entering this state.
This item allows you to enable or disable the C7s power-saving state. The C7s power-saving state is similar
to the C7 state, with the addition of the level 3 cache being flushed immediately when entering this state.
This item allows you to enable or disable the C7r power-saving state. The C7r power-saving state is similar to
the C7 state with a lower retention voltage.
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