Section Five; Programming Considerations; Initialization - National Instruments Corporation GPIB-1014P User Manual

Section Five

Programming Considerations

This section explains important considerations for programming the GPIB-1014P.

Initialization

On power-up (pon), the VMEbus system typically issues a system reset (SYSRESET*) that drives
the GPIB-1014P RESET* signal active and initializes the following circuitry:
• Timing State Machine
• Interrupter
µPD7210 TLC
•
The NEC µPD7210 Talker/Listener/Controller (TLC) integrated circuit is initialized as follows:
• The local message pon is set and the interface functions are placed in their idle states (SIDS,
AIDS, TIDS, SPIS, TPIS, LIDS, LPIS, NPRS, LOCS, PPIS, PUCS, CIDS, SRIS, SIIS).
• All bits of the Serial Poll Mode Register (SPMR) are cleared.
• End Or Identify (EOI) bit is cleared.
• All bits of the Auxiliary Registers A, B, and E (AUXRA, AUXRB, and AUXRE) are cleared.
• The Parallel Poll Flag and Request System Control (RSC) local message are cleared.
• The Internal Clock Register (ICR) is set to a count of eight.
• The Transmit Receive Mode 0 (TRM0) and Transmit Receive Mode 1 (TRM1) bits in the
Address Mode Register (ADMR) are cleared.
All other TLC register contents should be considered as undefined while the RESET* is asserted
and after RESET* has been cleared. All Auxiliary Mode Register (AUXMR) commands are
cleared and cannot be executed. All other TLC registers can be programmed while the TLC internal
signal pon is set. When pon is released or cleared (by issuing an Immediate Execute pon auxiliary
command to the TLC), the interface functions are released from the pon state and the auxiliary
commands can be executed.
© National Instruments Corporation 5-1 GPIB-1014P User Manual