Vmebus Slave-Data; Table 2-2. Μpd7210 Internal Gpib Interface Registers - National Instruments Corporation GPIB-1014P User Manual

Section Two
Table 2-2. µPD7210 Internal GPIB Interface Registers
Address (Base
+ Hex Offset)
1
1
3
3
5
5
7
7
9
9
B
B
D
D
F
F

VMEbus Slave-Data

As discussed previously, the GPIB-1014P can function as a VMEbus slave, decoding memory
addresses and commands from a VMEbus master. It is designed to accommodate address
pipelining as well as Address Only (ADO) cycles. All data is transferred to and from the
VMEbus with lines D00 through D07. In VMEbus terminology, the slave module of the board is
designated as A16/D08(0). The board does not implement Unaligned Transfer (UAT), Block
Transfer (BLT), and Read-Modify-Write (RMW) cycles.
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Mode
R Data In
W Control/Data Out
R Interrupt Status 1
W Interrupt Mask 1
R Interrupt Status 2
W Interrupt Mask 2
R Serial Poll Status
W Serial Poll Mode
R Address Status
W Address Mode
R Command Pass Through
W Auxiliary Mode
R Address 0
W Address
R Address 1
W End of String
2-3
Register
(DIR)
(CDOR)
(ISR1)
(IMR1)
(ISR2)
(IMR2)
(SPSR)
(SPMR)
(ADSR)
(ADMR)
(CPTR)
(AUXMR)
(ADR0)
(ADR)
(ADR1)
(EOSR)
GPIB-1014P User Manual
General Description
Size
8 bits
8 bits
8 bits
8 bits
8 bits
8 bits
8 bits
8 bits
8 bits
8 bits
8 bits
8 bits
8 bits
8 bits
8 bits
8 bits