National Instruments Corporation GPIB-1014P User Manual page 48

Section Four
Bit Mnemonic
5r DET
5w DET IE
4r END RX
4w END IE
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Description
TPAS: GPIB Talker Primary Addressed State
LPAS: GPIB Listener Primary Addressed State
SCG: GPIB Secondary Command Group
ACDS: GPIB Accept Data State
pon: power on reset
Read ISR1: Bit is cleared immediately after it is read.
The APT bit indicates that a secondary GPIB address has been received
and is available in the CPTR for inspection.
Note: The application program must check this bit when using TLC
address mode 3).
When APT is set, the DAC message is held and the GPIB handshake
stops until either the Valid or Non-Valid auxiliary command is issued.
The secondary address can be read from the CPTR.
Device Execute Trigger Bit
Device Execute Trigger Interrupt Enable Bit
DET is set by:
DTAS
DET is cleared by:
pon + (Read ISR1)
Notes:
DTAS: GPIB Device Trigger Active State
pon: power on reset
Read ISR1: Bit is cleared immediately after it is read.
The DET bit indicates that the GPIB Device Execute Trigger (DET)
command has been received while the TLC was a GPIB Listener (the
TLC has been in DTAS).
End Received Bit
End Received Interrupt Enable Bit
END RX is set by:
LACS & (EOI + EOS & REOS) & ACDS
END RX is cleared by:
pon + (Read ISR1)
4-11
Register Bit Descriptions
GPIB-1014P User Manual