National Instruments Corporation GPIB-1014P User Manual page 61

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Register Bit Descriptions
Bit
Mnemonic
3-2w
0
1-0w
ADM[1-0]
GPIB-1014P User Manual
Description
Key
EOI OE = GPIB EOI signal output enable
CIC
= Controller-In-Charge
TRIG
= Trigger
PE
= Pull-up Enable
For proper operation, set both TRM1 and TRM0 (which selects T/R2 =
CIC and T/R3 = PE).
Reserved Bits
Write zeros to these bits.
Address Mode Bits 1 through 0
These bits state the addressing mode currently in effect–that is, the
manner in which the information in ADR0 and ADR1 is interpreted (see
Address Register 0 and Address Register 1 later in this section). If both
bits are zero then the TLC does not respond to GPIB address commands.
Instead, the ton and lon bits are used to program the Talker and Listener
functions, respectively. The ton and lon bits must be cleared if mode 1,
2, or 3 addressing is selected, and the AMD[1-0] bits must be cleared if
either of the bits ton or lon are set.
Mode
ADM1 ADM0
0
0
1
0
2
1
3
1
In mode 1 ADR0 and ADR1 contain the major and minor addresses,
respectively, for dual primary GPIB address applications; that is, the TLC
responds to two GPIB addresses: a major address and a minor address.
The MJMN bit in the ADSR indicates which address was received. In
applications where the TLC needs to respond to only one address, the
major Talker and Listener function is used and the minor Talker and
Listener function should be disabled. The minor Talker and Listener
function can be disabled by setting the Disable Talker (DT) and Disable
Listener (DL) bits in ADR1 (set ADR and ADR1).
In mode 2 (ADM1=1, ADM0=0), the TLC recognizes two sequential
GPIB address bytes, a primary followed by a secondary. Both GPIB
address bytes must be received in order to enable the TLC to talk or
listen. In this manner, mode 2 addressing uses the Extended Talker and
Extended Listener functions as defined in IEEE- 488, without requiring
computer program intervention. In mode 2, ADR0 and ADR1 contain
the TLC primary and secondary GPIB addresses, respectively.
4-24
Title
0
ton/lon
1
Normal dual addressing
0
Extended single addressing
1
Extended dual addressing
© National Instruments Corporation
Section Four

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