National Instruments Corporation GPIB-1014P User Manual page 160

Index
B
base address, VMEbus, configuring, 3-3 to 3-4
BIN (Binary Bit), 4-38
bus signals. See VMEbus.
C
cable shield grounding, GPIB, 3-8
cabling, 3-10 to 3-11
capability codes for GPIB-1014P, 2-10 to 2-12
CDO[7-0] (Command/Data Out Bits 7 through 0), 4-7
CDOR. See Command/Data Out Register (CDOR).
Chip Reset command
codes for, 4-28
description, 4-30 to 4-31
CIC (Controller-In-Charge Bit), 4-20
Clear IFC command
codes for, 4-29
description, 4-34
Clear Parallel Poll Flag command
codes for, 4-28
description, 4-32
Clear REN command
codes for, 4-29
description, 4-34
CLK[3-0] (Clock Bits 3 through 0), 4-35
clock and reset circuitry
definition, 2-9
operation, 6-2
CNT[2-0] (Control Code Bits 2 through 0), 4-27 to 4-34
CO (Command Out Bit), 4-16
CO IE (Command Out Interrupt Enable Bit), 4-16
Command/Data Out Register (CDOR), 4-7
Command Pass Through Register (CPTR), 4-25 to 4-26
COMMAND SEND-CSEND sample program, C-17
commands
auxiliary command summary
detailed description, 4-30 to 4-34
table of, 4-28 to 4-29
commands or command messages, E-1
multiline GPIB commands (table), D-2 to D-3, 4-25 to 4-26
configuration
GPIB cable shield grounding, 3-8
interrupt status/ID vector selection, 3-7
jumpers and switches, 3-2
requirements, E-6
Supervisor or Non-privileged access, 3-3
VMEbus base address, 3-3 to 3-4
VMEbus interrupt, 3-5 to 3-6
GPIB-1014P User Manual Index-2 © National Instruments Corporation