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A
abbreviations used in the manual, vi
access mode, configuration, 3-3
AD5-0 through AD1-0 (Mode 2 Primary GPIB Address Bits 5-0 through 1-0), 4-43
AD5-1 (Address Bit), 4-44
AD[5-1 -- 1-1] (Mode 2 Secondary TLC GPIB Address Bits 5-1 through 1-1), 4-45
address
decoding, 6-2
definition, 2-9
VMEbus address lines, 6-2
VMEbus base address configuration, 3-3 to 3-4
VMEbus slave-addressing, 2-2 to 2-3
Address Mode Register (ADMR), 4-22 to 4-24
Address Register 0 (ADR), 4-44
Address Register 1 (ADR1), 4-45
Address Status Register (ADSR), 4-20 to 4-21
addressed implementation of Talker and Listener, 5-5 to 5-7
ADM[1-0] (Address Mode Bits 1 through 0), 4-23 to 4-24
ADMR. See Address Mode Register (ADMR).
ADR. See Address Register 0 (ADR).
ADR0. See Auxiliary Register 0 (ADR0).
ADR1. See Address Register 1 (ADR1).
ADSC (Addressed Status Change Bit), 4-17 to 4-18
ADSC IE (Addressed Status Change Interrupt Enable Bit), 4-17 to 4-18
ADSR. See Address Status Register (ADSR).
AH (Acceptor Handshake), 4-6
APT (Address Pass-Through Bit), 4-9 to 4-10
APT IE (Address Pass-Through Interrupt Enable Bit), 4-9 to 4-10
ARS (Address Register Select Bit), 4-44
ATN* (Attention* Bit), 4-20
ATN (attention) line, E-3
auxiliary command summary
detailed description, 4-30 to 4-34
table of, 4-28 to 4-29
Auxiliary Mode Register (AUXMR)
command summary (table), 4-28 to 4-34
overview, 4-27 to 4-28
Auxiliary Register 0 (ADR0), 4-43
Auxiliary Register A (AUXRA), 4-38 to 4-39
Auxiliary Register B (AUXRB), 4-40 to 4-41
Auxiliary Register E (AUXRE), 4-42
© National Instruments Corporation
Index-1
Index
GPIB-1014P User Manual

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