National Instruments Corporation GPIB-1014P User Manual page 62

Section Four
Bit Mnemonic
© National Instruments Corporation
Description
In mode 3 (ADM1=1, ADM0=1), the TLC handles addressing just as it
does in mode 1, except that each major or minor GPIB primary address
must be followed by a secondary address. All secondary GPIB
addresses must be verified by computer program when mode 3 is used.
When the TLC is in Talker Primary Addressed State (TPAS) or Listener
Primary Addressed State (LPAS) and a secondary address byte is on the
GPIB DIO lines, the APT bit of ISR2 is set and the secondary GPIB
address may be inspected in the CPTR. The TLC Acceptor Handshake is
held up in the Accept Data State (ACDS) until the Valid or Non-Valid
auxiliary command is written to the AUXMR, signaling a valid or invalid
secondary address, respectively, to the TLC.
ADM0 and ADM1 must be cleared when either of the two
programmable bits ton or lon is set.
4-25
Register Bit Descriptions
GPIB-1014P User Manual