National Instruments Corporation GPIB-1014P User Manual page 60

Section Four
Address Mode Register (ADMR)
VMEbus Address:
Attributes:
7 6
ton 1on
Bit Mnemonic
7w ton
6w lon
5-4w TRM[1-0]
© National Instruments Corporation
Base Address + 9 (hex)
Write Only
5 4
TRM1 TRM0
Description
Talk Only Bit
Setting ton programs the TLC to be a GPIB Talker. If ton is set, the lon,
ADM1, and ADM0 bits must be cleared. This method must be used in
place of the addressing method when the TLC will be only a Talker.
Note: Clearing ton does not by itself take the TLC out of GPIB Talker
Active state (TACS). It is also necessary to execute the Chip
Reset or Immediate Execute pon auxiliary command.
Listen Only Bit
Setting lon programs the TLC to be a GPIB Listener. If lon is set, ton,
ADM1, and ADM0 should be cleared.
Note: Clearing lon does not by itself take the TLC out of Listener Active
state (LACS). It is also necessary to execute the Chip Reset or
Immediate Execute pon auxiliary command.
Transmit/Receive Mode Bits 1 through 0
TRM1 and TRM0 control the function of the TLC T/R2 and T/R3 output
pins in the following manner:
TRM1 TRM0
0
0
1
1
3 2
0 0
T/R2
0 EOI OE
1 CIC
0 CIC
1 CIC
4-23
Register Bit Descriptions
1 0
ADM1 ADM0
W
T/R3
TRIG
TRIG
EOI OE
PE
GPIB-1014P User Manual