2.2.22 (2) CMP (compare) (word)
Operation
Rd − Rs; set condition code
Assembly-Language Format
CMP.W Rs, Rd
Operand Size
Word
Condition Code
I
H
∆
—
—
—
I:
Previous value remains unchanged.
H:
Set to 1 when there is a borrow from bit 11; otherwise cleared to 0.
N:
Set to 1 when the result is negative; otherwise cleared to 0.
Z:
Set to 1 when the result is zero; otherwise cleared to 0.
V:
Set to 1 when an overflow occurs; otherwise cleared to 0.
C:
Set to 1 when there is a borrow from bit 15; otherwise cleared to 0.
Description
This instruction subtracts a source register from a destination register and sets the condition code
flags according to the result. The destination register is not altered.
Instruction Formats and Number of Execution States
Addressing
mode
Mnem.
Register direct
CMP.W
N
Z
V
C
∆
∆
∆
∆
Instruction code
Operands 1st byte 2nd byte
Rs, Rd
1
D
3rd byte 4th byte
0
rs 0
rd
No. of
states
2
75