Shar (Shift Arithmetic Right) - Hitachi H8/300L Series Programming Manual

2.2.48 SHAR (shift arithmetic right)

Operation
Rd (shifted arithmetic right) → Rd
Assembly-Language Format
SHAR Rd
Operand Size
Byte
Condition Code
I H
— — — —
I: Previous value remains unchanged.
H: Previous value remains unchanged.
N: Set to 1 when the result is negative; otherwise cleared to 0.
Z: Set to 1 when the result is zero; otherwise cleared to 0.
V: Cleared to 0.
C: Receives the previous value in bit 0.
Description
This instruction shifts an 8-bit general register one bit to the right. The most significant bit
remains unchanged. The sign of the result does not change. The least significant bit shifts into
the carry flag.
The operation is shown schematically below.
MSB
Bit 7
N Z V C
∆ ∆
—
0
LSB
Bit 0 C
113