Bsr (Branch To Subroutine) - Hitachi H8/300L Series Programming Manual

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2.2.18 BSR (branch to subroutine)

Operation
PC → @−SP
PC + d:8 → PC
Assembly-Language Format
BSR d:8
Operand Size
Condition Code
I
H
— —
I:
Previous value remains unchanged.
H:
Previous value remains unchanged.
N:
Previous value remains unchanged.
Z:
Previous value remains unchanged.
V:
Previous value remains unchanged.
C:
Previous value remains unchanged.
Description
This instruction pushes the program counter (PC) value onto the stack, then adds a specified
displacement to the program counter value and branches to the resulting address. The program
counter value used is the address of the instruction following the BSR instruction.
The displacement is a signed 8-bit value which must be even. The possible branching range is −
126 to +128 bytes from the address of the BSR instruction.
Instruction Formats and Number of Execution States
Addressing
mode
Mnem.
PC-relative
BSR
N
Z
V
C
Instruction code
Operands
1st byte
d:8
5
5
2nd byte
3rd byte
disp
No of
4th byte
states
6
67

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