Or (Inclusive Or Logical) - Hitachi H8/300L Series Programming Manual

2.2.37 OR (inclusive OR logical)

Operation
Rd ∨ (EAs) → Rd
Assembly-Language Format
OR <EAs>, Rd
Operand Size
Byte
Condition Code
I H
— — — —
I: Previous value remains unchanged.
H: Previous value remains unchanged.
N: Set to 1 when the result is negative; otherwise cleared to 0.
Z: Set to 1 when the result is zero; otherwise cleared to 0.
V: Cleared to 0.
C: Previous value remains unchanged.
Description
This instruction ORs the source operand with the contents of an 8-bit general register and places
the result in the general register.
Instruction Formats and Number of Execution States
Addressing
mode Mnem.
Immediate OR
Register direct OR
102
N Z V C
∆ ∆
—
0
Instruction code
Operands 1st byte
#xx:8, Rd C rd
Rs, Rd 1 4
2nd byte 3rd byte 4th byte
IMM
rs rd
No. of
states
2
2