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Table 2-2. List of Instructions (6)
Mnemonic
BPL d:8
--
BMI d:8
--
BGE d:8
--
BLT d:8
--
BGT d:8
--
BLE d:8
--
JMP @Rn
--
JMP @aa:16
--
JMP @@aa:8
--
BSR
--
JSR @Rn
--
JSR @aa:16
--
JSR @@aa:8
--
RTS
--
RTE
SLEEP
--
LDC #xx:8,CCR
B
LDC Rs,CCR
B
STC CCR,Rd
B
ANDC #xx:8,CCR
B
ORC #xx:8,CCR
B
Addressing Mode and
Instruction Length (Bytes)
Operation
Branching
Condition
if condition
N=0
is true
then
←
PC
PC+d
:8 else
next;
N=1
⊕
N
V=0
⊕
N
V=1
⊕
Zv(N
V)=0
⊕
Zv(N
V)=1
←
PC
Rn16
←
PC
aa:16
←
PC
@aa:8
→
SP-2
SP
→
PC
@SP
←
PC
PC+d:8
→
SP-2
SP
→
PC
@SP
←
PC
Rn16
→
→
SP-2
SP PC
@SP
←
PC
aa:16
→
→
SP-2
SP PC
@SP
←
PC
@aa:8
←
PC
SP
→
SP+2
SP
←
→
CCR
@SP SP+2
SP
←
→
PC
@SP SP+2
SP
Transit to sleep mode.
→
#xx:8
CCR
2
→
Rs8
CCR
2
→
CCR
Rd8
2
→
CCR^#xx:8
CCR
2
→
CCR^#xx:8
CCR
2
I
2
-
2
-
2
-
2
-
2
-
2
-
2
-
4
-
2
-
2
-
2
-
4
-
2
-
2
-
∆
2
2
-
∆
∆
-
∆
∆
Condition Code
H
N
Z
V0
C
-
-
-
-
-
4
-
-
-
-
-
4
-
-
-
-
-
4
-
-
-
-
-
4
-
-
-
-
-
4
-
-
-
-
-
4
-
-
-
-
-
4
-
-
-
-
-
6
-
-
-
-
-
8
-
-
-
-
-
6
-
-
-
-
-
6
-
-
-
-
-
8
-
-
-
-
-
8
-
-
-
-
-
8
∆
∆
∆
∆
∆
10
-
-
-
-
-
2
∆
∆
∆
∆
∆
2
∆
∆
∆
∆
∆
2
-
-
-
-
-
2
∆
∆
∆
∆
∆
2
∆
∆
∆
∆
∆
2
135
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