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4.2
On-chip Peripheral Modules and External Devices
On-chip peripheral modules are accessed in two or three states. The data bus width is 8 bits, so
access is made in byte size only. Access to word data or instruction codes is not possible. Figure
4-2 shows the on-chip peripheral module access cycle.
φ
Internal address bus
Internal read signal
Internal data bus*
(read access)
Internal write signal
Internal data bus*
(write access)
φ
Note: An 8-bit data bus is used.
152
Bus cycle
T
state
T
state
1
2
Address
Read data
Write data
(a) Two-state access
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