Table of Contents
Advertisement
2.2.53(2) SUB (subtract binary) (word)........................................................................ 123
2.2.54 SUBS (subtract with sign extension) ................................................................. 124
2.2.55 SUBX (subtract with extend carry) ................................................................... 125
2.2.56 XOR (exclusive OR logical) ............................................................................. 126
2.2.57 XORC (exclusive OR control register).............................................................. 127
2.3 Operation Code Map........................................................................................................ 128
2.4 List of Instructions ........................................................................................................... 130
2.5 Number of Execution States............................................................................................. 138
Section 3. CPU Operation States ......................................................................145
3.1 Program Execution State.................................................................................................. 146
3.2 Exception Handling States ............................................................................................... 146
3.2.1 Types and Priorities of Exception Handling ........................................................ 146
3.2.2 Exception Sources and Vector Table................................................................... 148
3.2.3 Outline of Exception Handling Operation ........................................................... 148
3.3 Reset State ....................................................................................................................... 149
3.4 Power-Down State ........................................................................................................... 149
Section 4. Basic Operation Timing ...................................................................151
4.1 On-chip Memory (RAM, ROM)....................................................................................... 151
4.2 On-chip Peripheral Modules and External Devices........................................................... 152
iii
Advertisement
Table of Contents
