2.2.53(2) SUB (subtract binary) (word)
Operation
Rd - Rs → Rd
Assembly - Language Format
SUB.W Rs, Rd
Operand Size
Word
Condition Code
I
H
∆
— —
—
I:
Previous value remains unchanged.
H:
Set to 1 when there is a borrow from bit 11; otherwise cleared to 0.
N:
Set to 1 when the result is negative; otherwise cleared to 0.
Z:
Set to 1 when the result is zero; otherwise cleared to 0.
V:
Set to 1 when an overflow occurs; otherwise cleared to 0.
C:
Set to 1 when there is a borrow from bit 15; otherwise cleared to 0.
Description
This instruction subtracts a 16-bit source register from a 16-bit destination register and places
the result in the destination register.
Instruction Formats and Number of Execution States
Addressing
mode
Mnem.
Register direct
SUB.W
N
Z
V
C
∆
∆
∆
∆
Instruction code
Operands
1st byte
Rs, Rd
1
9
2nd byte
3rd byte
0
rs
0
rd
No. of
4th byte
states
2
123