Table 5.8. Fx12 U5 Header Pin Connections - Lattice Semiconductor MachXO3-940 User Manual

Table 5.7. FX12 U4 Header Pin Connections (continued)
U4 Pin Number
38
39
40
Notes:
* Signal is optionally connected to power source through resistor; DNI.
** 12 V power needs external supply from pin 8 of J4.

Table 5.8. FX12 U5 Header Pin Connections

U5 Pin Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
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trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02004-1.0
Signal Name
PWR_5-0V*
SDA1
SCL1
Signal Name
CH1_DCK_P
CH1_DCK_N
GND
CH1_DATA0_P
CH1_DATA0_N
GND
CH1_DATA2_P
CH1_DATA2_N
GND
FX_SN*
FX_SCLK*
PWR_12V**
SDA2
SCL2
GND
CH3_DATA0_P
CH3_DATA0_N
GND
CH3_DCK_P
CH3_DCK_N
PWR_12V**
RESETN
PWR_5-0V*
CH1_DATA1_P
CH1_DATA1_N
PWR_3-3V*
CH1_DATA3_P
CH1_DATA3_N
PWR_1-8V
FX_MOSI*
FX_MISO*
PWR_1-8V*
GND
MachXO3-9400 Development Board
Evaluation Board User Guide
MachXO3 Ball Location
-
AA11
AB11
MachXO3 Ball Location
AB12
AA12
—
AB16
AA16
-
AB17
AA17
—
—
—
—
AB13
AA13
— -
AB18
AA18
— -
AB19
AA19
— -
AB3
— -
AB14
AA14
— -
AB15
AA15
—
—
—
—
—
19