Table 5.2. Versa X3 Header Pin Connections - Lattice Semiconductor MachXO3-940 User Manual

Table 5.1. Versa X2 Header Pin Connections (continued)
X2 Pin Number
36
37
38
39
40
Notes:
* Signal is optionally connected to power source through resistor; DNI.
** Signal is optionally connected to power source through resistor; DN.

Table 5.2. Versa X3 Header Pin Connections

X3 Pin Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
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trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02004-1.0
Signal Name
GND
EXPCON_3V3**
GND
EXPCON_3V3**
GND
Signal Name
HPE_RESOUT#
GND
EXPCON_IO0
EXPCON_IO1
EXPCON_IO2
EXPCON_IO3
EXPCON_IO4
EXPCON_IO5
EXPCON_IO6
EXPCON_IO7
EXPCON_IO8
EXPCON_IO9
EXPCON_IO10
EXPCON_IO11
EXPCON_IO12
EXPCON_IO13
EXPCON_IO14
EXPCON_IO15
GND
EXPCON_3V3**
EXPCON_IO16
GND
EXPCON_IO17
GND
EXPCON_IO18
GND
EXPCON_IO19
EXPCON_IO20
EXPCON_IO21
GND
EXPCON_IO22
MachXO3-9400 Development Board
Evaluation Board User Guide
MachXO3 Ball Location
—
—
—
—
—
MachXO3 Ball Location
G9
—
F8
G8
F9
F7
E7
E6
D5
C3
D6
C4
F10
C5
C6
B12
D7
A12
—
—
D8
—
C8
—
D9
—
E10
C9
G11
—
E11
15