Headers And Test Connections; Versa Headers; Table 5.1. Versa X2 Header Pin Connections - Lattice Semiconductor MachXO3-940 User Manual

MachXO3-9400 Development Board
Evaluation Board User Guide

Headers and Test Connections

This section describes the MachXO3-9400 Development Board headers and test connections.

5.1. Versa Headers

The board provides two headers – X2 and X3 for expansion purpose.

Table 5.1. Versa X2 Header Pin Connections

X2 Pin Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
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14
Signal Name
GND
NC
EXPCON_2V5*
EXPCON_IO29
EXPCON_IO30
EXPCON_IO31
EXPCON_IO32
EXPCON_IO33
EXPCON_IO34
EXPCON_IO35
EXPCON_IO36
EXPCON_IO37
EXPCON_IO38
EXPCON_IO39
EXPCON_IO40
EXPCON_IO41
EXPCON_IO42
EXPCON_IO43
EXPCON_IO44
EXPCON_IO45
5VIN*
GND
EXPCON_2V5*
GND
VCCIO0
GND
VCCIO0
GND
EXPCON_OSC*
GND
EXPCON_CLKIN
GND
EXPCON_CLKOUT
GND
EXPCON_3V3**
MachXO3 Ball Location
—
—
—
E12
D14
C15
C17
D15
C18
D16
C19
D17
D18
C20
E16
E13
F13
F15
G15
G12
—
—
—
—
—
—
—
—
—
—
A10
—
A21
—
—
FPGA-EB-02004-1.0