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MachXO3-9400 Development Board
Evaluation Board User Guide
2
3.2. I
C Download Interface
The USB hub on the PC can also detect the addition of the USB function on Port 1. Select the port FTUSB-1 on the
programmer interface and enable the I
(D57 red LED is lighted). The I
3.3. Alternate JTAG Download Interface
J1 is an 8-pin standalone JTAG header that is used with an external Lattice download cable (available separately) when
the FTDI part is disabled from the JTAG chain after setting JP9. A USB download cable can be attached to the board
using J1 to interface with the MachXO3. For details on the connection between the USB download cable and J1, refer
to UG48,
Programming Cable User's
J1 can also be used as test point when USB to JTAG is working. Additionally, you can enable the JTAG access path
through the Raspberry Pi header (JP3) for customer applications. This is done by connecting the JP3 header to the J1
header through some onboard resistors. The JTAG connections between J1 and JP3 are listed in
Table 3.1. JTAG Connections
J1 Pin Number
JTAG Signal Name
1
VCCIO0
2
3
4
5
6
7
8
3.4. JTAG to MSPI Pass-through Interface
The download controller can also access the JTAG to MSPI pass-through circuit that allows the slave SPI Flash to be
erased, programmed, and read with Diamond Programmer.
3.5. Other JTAG Configuration Pins
The MachXO3-9400 Development Board provides test points for other JTAG configuration pins as shown in
Table 3.2. Other JTAG Signals
Signal Name
JTAGENB
PROGRAMN
INITN
DONE
For more information on MachXO3 JTAG/ I
Configuration Usage
Guide.
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
12
2
C MUX path from FTDI to the I
2
C interface programming can be also used to configure the MachXO3 and ASC.
Guide.
MachXO3 Ball
Location for JTAG
—
TDO
E8
TDI
E9
—
—
—
—
TMS
C10
GND
—
TCK
D10
MachXO3 Ball Location
2
C programming, refer to TN1279,
2
C bus. This is done by setting the J10 jumper
JP3 Pin Number
J1 to JP3 Isolation
(Assembly)
—
10
R90 (DNI)
11
R93 (DNI)
—
—
12
R91 (DNI)
—
8
R95 (DNI)
E14
E15
F16
E17
MachXO3 Programming and
Table
3.1.
Raspberry Pi GPIO
—
—
IO15
IO17
—
—
—
—
IO18
—
—
IO14
Table
3.2.
Test Point
TP6
Pin 1 of JP5
TP7
TP8
FPGA-EB-02004-1.0
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