Features; Figure 1.2. Bottom View Of Machxo3-9400 Development Board - Lattice Semiconductor MachXO3-940 User Manual

1.2. Features


LCMXO3LF-9400C CPLD demonstration with L-ASC10 for simple hardware management including voltage, current
and temperature monitoring

General Purpose Input/Output (GPIO) interface with Arduino and Raspberry Pi boards

USB-B connection for device programming and Inter-Integrated Circuit (I

On-board Boot Flash – 16 Mbit Serial Peripheral Interface (SPI) Flash, with Quad read feature for user's application

4-position DIP Switches, 4 push buttons and 16 LEDs for demo purposes

®
Diamond programming support

Multiple reference clock sources

Two Hirose FX12-40 header positions (DNI)

Aardvark header (DNI)
Note: DNI stands for "Do NOT Install" parts and DI stands for "Do Install" parts for assembly.
Caution: The MachXO3-9400 Development Board contains ESD-sensitive components. ESD safe
practices should be followed while handling and using the development board.
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02004-1.0

Figure 1.2. Bottom View of MachXO3-9400 Development Board

MachXO3-9400 Development Board
Evaluation Board User Guide
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C) utility
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