Configuration
4.3.7
Board Interrupt Configuration Register (BICFG)
The Board Interrupt Configuration Register holds a series of bits defining the interrupt routing.
Table 4-9:
Board Interrupt Configuration Register (BICFG)
REGISTER NAME
ADDRESS
BIT
NAME
7
UICF
UART IRQ3 and IRQ4 interrupt configuration:
0 = Disabled
1 = Enabled
6
CFICF
CPCI fail signal interrupt configuration (FAL signal):
0 = IRQ5 disabled
1 = IRQ5 enabled
5
CEICF
CPCI enumeration signal interrupt configuration (ENUM signal):
0 = IRQ5 disabled
1 = IRQ5 enabled
4
CDICF
CPCI derate signal interrupt configuration (DEG signal):
0 = IRQ5 disabled
1 = IRQ5 enabled
3 - 2
Res.
Reserved
1 - 0
WICF
Watchdog interrupt configuration:
00 = Disabled
01 = IRQ5
10 = Reserved
11 = Reserved
Page 4 - 10
BOARD INTERRUPT CONFIGURATION REGISTER (BICFG)
DESCRIPTION
0x286
ID 1042-9252, Rev. 2.0
CP3002
RESET
ACCESS
VALUE
1
R/W
0
R/W
0
R/W
0
R/W
00
R
00
R/W