Watchdog, Compactpci Interrupt Configuration Register - Kontron CP6500-V User Manual

Configuration
4.5.5

Watchdog, CompactPCI Interrupt Configuration Register

The interrupt configuration register holds a series of bits defining the interrupt routing for the
watchdog, the power control derate signal and the CompactPCI enumeration signal. If the
watchdog timer fails, it can generate three independent hardware events: reset, NMI and IRQ5
interrupt.
The enumeration signal is generated by a hot swap compatible board after insertion and prior
to removal. The system uses this interrupt signal to force software to configure the new board.
The derate signal indicates that the power supply is beginning to derate its power output.
Table 4-19: Watchdog, CompactPCI Interrupt Configuration Register
REGISTER NAME
ADDRESS
BIT POSITION
CONTENT WNMI
DEFAULT
BIT NAME
0 HSIRQ
1 WIRQ
2 WRST
3 CDIRQ
4 CEIRQ
5 CFIRQ
6 CFNMI
7 WNMI
Note ...
To enable the dual stage watchdog, the NMI and the reset bits must be set. At
the first stage the watchdog generates an NMI, and at the second stage the
system will be reset.
Page 4 - 14
Interrupt Configuration Register
7 6 5
CFNMI CFIRQ
0 0 0
VAL
0 Disable hot swap handle IRQ5
1 Enable hot swap handle IRQ5
0 Disable Watchdog IRQ5 routing
1 Enable Watchdog IRQ5 routing
0 Disable Watchdog hardware reset
1 Enable Watchdog hardware reset
0 Disable CPCI derate signal to IRQ5 routing
1 Enable CPCI derate signal to IRQ5 routing
0 Disable CPCI enum signal to IRQ5 routing
1 Enable CPCI enum signal to IRQ5 routing
0 Disable CPCI fail signal to IRQ5 routing
1 Enable CPCI fail signal to IRQ5 routing
0 Disable CPCI fail signal to NMI routing
1 Enable CPCI fail signal to NMI routing
0 Disable Watchdog NMI routing
1 Enable Watchdog NMI routing
© 2005 Kontron Modular Computers GmbH
0x284
4 3
CEIRQ CDIRQ
0 0
DESCRIPTION
CP6500-V
ACCESS
R W
2 1 0
WRST WIRQ HSIRQ
0 0 0
ID 28945, Rev. 01