Xilinx ZCU111 User Manual page 43

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Ethernet PHY Reset
[Figure
2-1, callout 12]
The DP83867IRPAP PHY U37 LED interface is shown in
be reset by the GEN3_EXP_RESET_B signal via the I2C0 TCA6416A U22 bus expander P06 pin
10 or the PS_POR_B signal generated by the MAX16025 U6 POR device pin 11. The SW3
pushbutton at the MAX16025 U6 pin 6 input also triggers a PS_POR_B signal.
X-Ref Target - Figure 3-11
Ethernet PHY LED Interface
[Figure
2-1, callout 9]
The DP83867IRPAP PHY U37 LED interface (LED_0, LED_2) uses the two LEDs embedded in
the P12 RJ45 connector bezel. The LED functional description is listed in
Table 3-15: Ethernet PHY LED Functional Description
DP83867IR PHY U37 Pin
Name
LED_2
LED_1
LED_0
ZCU111 Board User Guide
UG1271 (v1.1) August 6, 2018
Figure 3-11: Ethernet PHY Reset Circuit
Type
Number
61
S, I/O, PD
62
S, I/O, PD
63
S, I/O, PD
www.xilinx.com
Chapter 3: Board Component Descriptions
Figure
3-11. The DP83867IRPAP can
Description
By default, this pin indicates receive or transmit
activity. Additional functionality is configurable using
LEDCR1[11:8] register bits.
This pin is a strap configuration pin for RGZ devices
Note:
only.
By default, this pin indicates that 100BASE-T link is
established. Additional functionality is configurable
using LEDCR1[7:4] register bits.
By default, this pin indicates that link is established.
Additional functionality is configurable using
LEDCR1[3:0] register bits.
X20485-062118
Table
3-15.
43
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