Xilinx ZCU111 User Manual page 40

X-Ref Target - Figure 3-8
The USB3320 is clocked by a 24 MHz crystal (X2). See the Standard Microsystems
Corporation (SMSC) USB3320 data sheet for clocking mode details
the USB3320 PHY is implemented through the IP in the XCZU28DR RFSoC PS.
Table 3-13 describes the jumper settings for the USB 2.0 circuit.
The bold text in
Note:
on-the-go (OTG) mode.
Table 3-13: USB Jumper Settings
Header Function
J18 VBUS select
J17 Shield select
The shield for the USB 3.0 micro-B connector (J96) can be tied to GND by a jumper on header
Note:
J17 pins 2-3 (default). The USB shield can optionally be connected through a series capacitor to GND
by installing a capacitor (body size 0402) at location C171 and jumping pins 1-2 on header J17.
The USB3320 ULPI U12 transceiver circuit (see
programmable current limit switch (U13). This switch has an open-drain output fault flag on
pin 2, which turns on LED DS7 if over current or thermal shutdown conditions are detected.
DS7 is located in the U13 circuit area
transceiver circuit.
ZCU111 Board User Guide
UG1271 (v1.1) August 6, 2018
ULPI
USB
MIO
USB
GTR
Figure 3-8: USB Interface
Table 3-13 identifies the default shunt positions for USB 2.0 high-speed
Shunt Position
ON = Device mode (150 µF) and VBus power source
OFF = Device mode (5.7 µF)
Position 2-3 = Shield connected to GND
Position 1-2 = Shield floating
(Figure
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Chapter 3: Board Component Descriptions
SM3320
USB2.0
USB3
Connector
GTR Tx, Rx
Figure 3-9) has a Micrel MIC2544 high-side
2-1, callout 53). Figure 3-9
X20533-062118
[Ref 16]. The interface to
Notes
VBUS load capacitance
Optional C171 in position 1-2
shows the ULPI U12
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