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STEP 5 Operations
8.5.3
Clock (Clock-Pulse Generator)
This subsection describes how to program a clock-pulse generator.
Example: A clock-pulse generator can be implemented using a self-clocking timer that is
followed in the circuit by a binary scaler. Flag F 2.0 restarts timer T 7 each time it runs
down, i.e., flag F 2.0 is "1" for one cycle each time the timer runs down. The pulses of
flag F 2.0 applied to the binary scaler result in a pulse train with pulse duty factor 1:1
at output Q 0.6. The period of this pulse train is twice as long as the time value of the
self-clocking timer.
Timing Diagram
Signal states
1
0
1
0
T
STL
AN
F
2.0
L
KT
10.1
SR
T
7
NOP 0
NOP 0
NOP 0
A
T
7
=
F
2.0
***
A
F
2.0
F 2.0
AN
F
3.0
F 3.0
S
Q
0.6
A
F
2.0
F 2.0
A
F
3.0
F 3.0
R
Q
0.6
NOP 0
F 2.0
***
AN
F
2.0
Q 0.6
A
Q
0.6
S
F
3.0
F 2.0
AN
F
2.0
Q 0.6
AN
Q
0.6
R
F
3.0
NOP 0
8-78
F 2.0
Q 0.6
Time
T
CSF
T 7
T
0
F 2.0
KT 10.1
TV
BI
DE
R
Q
F 2.0
Q 0.6
&
S
&
R
Q
F 3.0
&
S
&
R
Q
S5-115U Manual
Circuit Diagram
G
F 2.0
F 3.0
Q 0.6
LAD
F 2.0
T 7
T
0
TV
BI
KT 10.1
DE
R
Q
Q 0.6
F 2.0
F 3.0
S
F 2.0
F 3.0
R
Q
F 2.0
Q 0.6
F 3.0
S
F 2.0
Q 0.6
R
Q
EWA 4NEB 811 6130-02b
F 2.0
( )
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