Page 1 SIMATIC S5 S5-95F Programmable Controller Manual EWA 4NEB 812 6210-02a Edition 02...
Page 2 STEP®, SINEC® and SIMATIC® are registered trademarks of Siemens AG. Copyright© Siemens AG 1995 Subject to change without prior notice The reproduction, transmission or use of this document or its contents is not permitted without express written authority. Offenders will be liable for damages.
Page 3 Introduction S5-95F Failsafe Mini PLC Design, Functions and Operation Guidelines for the Planning and Installation of the Product Installing and Connecting the Basic System Expansion of Basic System with External I/Os Addressing Introduction to STEP 5 STEP 5 Operations Blocks and Their Functions The Integral Real-Time Clock Analog Value Processing Interrupt Processing...
Page 4: Table Of Contents
S5-95F Contents Contents Page Introduction ........... . . xvii S5-95F Failsafe Mini PLC .
Page 5 Contents S5-95F Page Wiring of Programmable Controllers for EMC ..... 3 - 7 3.4.1 Routing of Cables ........3 - 7 3.4.2 Equipotential Bonding .
Page 6 S5-95F Contents Page Connection of Non-Failsafe I/O Modules ......5 - 19 Power Supplies for the S5-95F ....... 5 - 23 Electrical Potentials for the Onboard and External I/Os .
Page 7 Contents S5-95F Page Block Types ..........7 - 7 7.3.1 Organization Blocks (OBs) .
Page 8 S5-95F Contents Page System Operations ........8 - 63 8.3.1 Set Operations .
Page 9 Contents S5-95F Page 10.3 Structure of the Status Word and How to Scan it ....10- 6 10.4 Using the Programmer to Read and Set the Integral Real-Time Clock .
Page 10 S5-95F Contents Page S5-95F on SINEC L1 ......... . . 13- 1 13.1 Options for Connecting the S5-95F to the SINEC L1 LAN...
Page 11 Contents S5-95F Page Error Diagnosis and Elimination ........15- 1 15.1 S5-95F Responses to Errors...
Page 12 S5-95F Contents Page 16.4 S5-95F Operating Modes ........16 - 3 16.5 Programmer Functions and Error Diagnostics...
Page 13 Contents S5-95F Page 18.10 Response to I/O Errors ........18- 16 18.10.1 Passivating I/Os .
Page 14 S5-95F Contents Page Appendices Module Spectrum ..........A - 1 General Technical Specifications for Failsafe Modules .
Page 15: Introduction
S5-95F Introduction Introduction Please read the introduction carefully. You will then find it easier to use the manual and this will save time. The S5-95F is a failsafe programmable controller for the lower and mid performance ranges. It is for use wherever safety is the first priority and where potential dangers must be avoided.
Page 16 Introduction S5-95F • Module Spectrum (Appendix A) This chapter contains the technical specifications of the S5-95F and information on the modules that you can use to expand your controller. • Overviews (Appendices B through D) In these chapters you will find not only dimension drawings and a complete list of operations but also guidelines for handling electrostatic sensitive devices (ESD Guidelines).
Page 17 Failsafe communication using broadcast message frames (see section 13.3) • Simplified error acknowledgement (see section 15.4) Training SIEMENS offers a wide range of training courses for SIMATIC S5 users. Contact your Siemens representative for more information. EWA 4NEB 812 6210-02...
Page 18 Siemens. • The product will function correctly and safely only if it is transported, stored, set up, and installed as intended, and operated and maintained with care.
Page 19: S5-95F Failsafe Mini Plc
S5-95F Failsafe Mini PLC Typical Applications for the S5-95F Programmable Controller ..1 - 5 S5-95F Hardware ........1 - 7 S5-95F Programming and Parameterization Software .
Page 20 Figures Risk Graph and Quality Levels ....... . 1 - 2 Burner Control of a Power Plant .
Page 21: S5-95F Failsafe Mini Plc
S5-95F S5-95F Failsafe Mini PLC S5-95F Failsafe Mini PLC The SIMATIC S5 system family offers programmable controllers in all performance classes, from the mini PLC up to the high-end PLC. For your safety-oriented applications you can choose between the moduar S5-115F and the compact S5-95F.
Page 22: Risk Graph And Quality Levels
S5-95F Failsafe Mini PLC S5-95F Quality Levels to DIN V 19250 The classification to DIN 19250 is not based on existing regulations but rather uses risk parameters to define the risk inherent in a process. Risk parameters are the degree of damage, duration of stay in hazardous areas, the possibility of avoiding danger and the probability of undesired events arising.
Page 23: Burner Control Of A Power Plant
S5-95F S5-95F Failsafe Mini PLC • Danger prevention G1: Possible under certain conditions G2: Hardly possible • Probability of undesired events arising W1: Very low W2: Low W3: Relatively high Example: Power plant burner control The protection equipment of a power plant burner control must avoid gathering of an explosive gas-air mixture in the combustion chamber.
Page 24: Press Control
S5-95F Failsafe Mini PLC S5-95F Example: Press control The protection equipment of a press control must avoid uncontrolled, dangerous movements. The undesired event is the uncontrolled starting of the press from standstill or premature stopping of the press on request. The result of such an event can be major irreversible injury or the death of the operator (S2).
Page 25: Typical Applications For The S5-95F Programmable Controller
S5-95F S5-95F Failsafe Mini PLC Typical Applications for the S5-95F Programmable Controller The following table contains applications of the S5-95F. It also lists the relevant national and international regulations and standards and the quality levels to DIN V 19250. Table 1-2. Typical Applications for the S5-95F Application Primary Additional...
Page 26 S5-95F Failsafe Mini PLC S5-95F Table 1-2. Typical Applications for the S5-95F (Continued) Application Primary Additional Quality Regulation Regulations Level Gas high pressure pipes TRGL 181 DIN VDE 0160 VDE 0800 Liquid pipes TRBF 301 Automated transport systems ZH 1/473 Passenger and load EN 81 TRA 200...
Page 27: S5-95F Hardware
The basic configuration of the S5-95F programmable controller connected via a fiber optic link. The basic configuration offers you the following onboard 1/0s: 16 failsafe digital inputs 4 failsafe interrupt inputs 2 failsafe counter inputs 8 failsafe digital outputs . 8 non-failsafe digital outputs (4 DQs for each subunit) Figure 1-4.
Page 28: S5-95F Programming And Parameterization Software
S5-95F Failsafe Mini PLC S5-95F S5-95F Programming and Parameterization Software Programming Instead of Wiring Conventional controls using relays or contactors are hardwired. Their functions are implemented by wiring the switching elements. If the control task changes, time-consuming modifications of the wiring have to be made.
Page 29 S5-95F S5-95F Failsafe Mini PLC Parameter Assignment with COM 95F The COM 95F parameterization software offers you a user-friendly, interactive operator interface. It simplifies • Entering of system parameters • Startup • Error diagnostics • On-site acceptance Software Tools for Acceptance A software-supported acceptance procedure has been developed to simplify system acceptance.
Page 30: The Major Characteristics Of The S5-95F And S5-115F At A Glance
S5-95F Failsafe Mini PLC S5-95F The Major Characteristics of the S5-95F and S5-115F at a Glance Table 1-3. The Major Characteristics of the S5-95F and S5-115F at a Glance Characteristics S5-95F S5-115F Hardware Subunit dimensions (W×H×D) in mm 145×135×146 482×302×210 Supply voltage 24 V DC 24 V DC...
Page 31: Design, Functions And Operation
Design, Functions and Operation Basic System Design - without External I/Os ....2 - 1 Basic System Design - with External I/Os ....2 - 2 Internal Functions .
Page 32 Figures S5-95F LEDs, Controls and Interfaces ......2 - 1 Basic Unit with External I/Os .
Page 33: Design, Functions And Operation
Design, Functions and Operation Design, Functions and Operation This chapter contains information on the design and principle of operation of the S5-95F. Basic System Design - without External 1/0s The following section discusses the basic unit without expansions. The basic unit has inputs and outputs available on board.
Page 34 Design, Functions and Operation Basic System Design - with External 1/0s These external 1/0s can expand the basic system by using S5-1OOU modules (external 1/0s). consist of functional units that you can combine according to the task you want to perform. Example of a Subunit with External 1/0s Figure 2-2.
Page 35 S5-95F Design, Functions and Operation Power Supply Module The power supply module is required for the basic unit to use the 115 V/230 V AC supply voltages to generate the 24 V DC operating voltages. External I/O Modules The following external I/O modules can be used: •...
Page 36: Internal Functions
Design, Functions and Operation S5-95F Internal Functions 2.3.1 Integral Real-Time Clock The integral real-time clock enables you to manipulate and control non-failsafe process sequences on a time-dependent basis, offering the following possiblities: • Clock-time and calendar function This function allows you, for example, to determine exactly the point in time at which an error caused the S5-95F to go into the STOP mode.
Page 37: The Programmable Controllers' Principle Of Operation
S5-95F Design, Functions and Operation The Programmable Controllers' Principle of Operation This section describes how the controller processes your program. 2.4.1 Functional Units Basic unit Control Memory program Operating submodule and data system (EPROM) Arithmetic blocks (ROM) unit (RAM) Serial Timers interface Counters...
Page 38 Design, Functions and Operation S5-95F Program Memory (EPROM/RAM) In order to safely store the control program outside of the PLC, you must store it on an EPROM or EEPROM memory submodule. Programs that are available on a memory submodule (EPROM) can be copied to the internal program memory.
Page 39 S5-95F Design, Functions and Operation Table 2-1 gives information about the number and retentive characteristics (the internal memory contents are retained/are not retained) of these timers, counters, and flags. Table 2-1. Retentive and Non-Retentive Operands Flags, Counters, Timers, Data Blocks and System Data Operand Retentive Non-retentive...
Page 40: Mode Of Operation Of The External I/O Bus
Design, Functions and Operation S5-95F 2.4.2 Mode of Operation of the External I/O Bus The programmable controllers have a serial bus for the transfer of data between the CPU and the S5-100U modules. This serial bus has the following characteristics. •...
Page 41 S5-95F Design, Functions and Operation Data Cycle Prior to a program scan, the external I/O bus transfers the current information of the input modules to the process image input table (PII). At the same time, the information contained in the process image output table (PIQ) is transferred to the output modules.
Page 42 Design, Functions and Operation S5-95F Length of the Shift Register The total length of the shift register is obtained from the sum of the data bits of all plugged-in modules and of the empty slots. The check bit is not counted. You must know the length of the shift register to be able to determine the data cycle time.
Page 43: Operating Instructions
Displays and controls • Operating modes and statuses • Overall reset • Permissible memory submodules 2.5.1 Displays and Controls SIEMENS Battery compartment Battery 850mAh Battery Battery failure display OFF / ON/OFF switch 24V DC Figure 2-8. Displays and Controls I...
Page 44: Overview Of Leds
Design, Functions and Operation S5-95F Error LED (yellow) RUN LED (green) STOP LED (red) STOP DIP switch for subunit STOP identification and setting COPY of fiber optic cable length (under cover) Figure 2-9. Displays and Controls II Overview of LEDs Table 2-3.
Page 45: Operating Modes
S5-95F Design, Functions and Operation 2.5.2 Operating Modes The S5-95F distinguishes between three operating modes: • Test mode • Quasi-safety mode • Safety mode Safety Note Whenever the process controller executes safety functions, the S5-95F must operate in the "safety mode". The "test mode" and "quasi-safety mode" are for the exclusive purpose of testing the user program.
Page 46: Switching To Test Mode
Design, Functions and Operation S5-95F Test Mode If no EPROM submodule is plugged in, the S5-95F is automatically in the test mode. Via the programmer you transfer the control program directly into the internal RAM of the S5-95F. The test mode is used only to test the control program. You can use all programmer functions without any restrictions.
Page 47: Switching To Quasi-Safety Mode
S5-95F Design, Functions and Operation Quasi-Safety Mode The S5-95F is in the quasi-safety mode, if no EPROM submodule is plugged in and when you observe a special sequence when switching on the system. Via the programmer you transfer the control program directly into the internal RAM of the S5-95F. In the quasi-safety mode, the S5-95F operates in the same way as in the safety mode.
Page 48: Switching To Safety Mode
Design, Functions and Operation S5-95F Safety Mode The S5-95F is automatically in the safety mode, if the control program including DB1 is stored on an EPROM submodule and if both EPROM submodules are plugged in. Programmer operation is restricted in the safety mode. Self-test routine in safety mode Immediately after switching on the safety mode, the S5-95F executes the complete self-test routine and thus checks all components.
Page 49: Operating Statuses Of The S5-95F Following Power-Up
S5-95F Design, Functions and Operation 2.5.3 Operating Statuses of the S5-95F Following Power-Up Table 2-7. Operating Statuses of the S5-95F Following Power-Up Operating Prerequisite Characteristics of the Optical Status Operating Status Display System ON/OFF switches of Subunits are synchronized STOP LEDs initialization both subunits in "1"...
Page 50: Performing An Overall Reset On The S5-95F
Design, Functions and Operation S5-95F 2.5.4 Performing an Overall Reset on the S5-95F You should perform an overall reset • before you load a new control program into the S5-95F • if the S5-95F requests an overall reset because of an error, e.g. during system initialization. You are requested to perform an overall reset when the yellow error LED flashes regularly.
Page 51: 2.5.5 Function Of The Backup Battery
S5-95F Design, Functions and Operation Automatic Reset The S5-95F executes an automatic reset when the memory submodules are replaced by memory submodules of different type or size. When the programmable controller executes an automatic reset, the following data is retained: •...
Page 52: Memory Submodules
Design, Functions and Operation S5-95F 2.5.6 Memory Submodules If you want to operate the S5-95F in the safety mode, the control program must be stored on an EPROM submodule. The following table lists the permissible memory submodules. Table 2-8. Overview of EPROM Submodules Type of Submodule Order Number Capacity...
Page 53 Guidelines for the Planning and Installation of the Product Guidelines on the Safe Integration of the Product into its Environment ........3 - 1 Installation of Programmable Controllers in Accordance with Principles of EMC...
Page 54 Figures Electromagnetic Interference with Programmable Controllers ... 3 - 2 Rack Mounting of an S5-95F Two-Tier Configuration ....3 - 6 Routing of Equipotential Bonding Conductor and Signal Line .
Page 55: Guidelines For The Planning And Installation Of The Product
S5-95F Guidelines for the Planning and Installation of the Product Guidelines for the Planning and Installation of the Product The following sections contain instructions on the planning and installation of systems or plants equipped with programmable controllers. Guidelines on the Safe Integration of the Product into its Environment Since the product generally forms part of a larger system or plant, these guidelines are intended to help integrate the product into its environment without it constituting a source of danger.
Page 56: Installation Of Programmable Controllers In Accordance With Principles Of Emc
Guidelines for the Planning and Installation of the Product S5-95F Installation of Programmable Controllers in Accordance with Principles of EMC Interference-Free Installation of the S5-95F What Does EMC Mean? Electromagnetic compatibility (EMC) is understood to mean the capability of electrical equipment to operate correctly in a defined electromagnetic environment, without being affected by the environment and without affecting the environment to an unacceptable degree.
Page 57 S5-95F Guidelines for the Planning and Installation of the Product Coupling Mechanisms and Typical Interference Sources at a Glance Table 3-1. Interference Sources and Their Causes Coupling Mechanism Cause Typical Interference Source Direct or metallic coupling always • Switched devices (supply affected by •...
Page 58: Most Important Basic Rules For Ensuring Emc
Guidelines for the Planning and Installation of the Product S5-95F 3.2.2 Most Important Basic Rules for Ensuring EMC It is often sufficient to comply with a few elementary rules for ensuring EMC. When installing the control system, therefore, observe the following five basic rules. When installing the programmable controllers, provide large-area good quality grounding of the inactive metal parts (see section 3.3.1) •...
Page 59: Installation Of Programmable Controllers For Emc
S5-95F Guidelines for the Planning and Installation of the Product Installation of Programmable Controllers for EMC Measures for suppressing interference voltages are often applied only when the control system is already operational and proper reception of a useful signal is impaired. The reason for such interference is usually inadequate reference potentials caused by mistakes in equipment assembly.
Page 60: 3.3.2 Example Of Rack Mounting For Emc
Guidelines for the Planning and Installation of the Product 3.3.2 Example of Rack Mounting for EMC secure standard Picked-up interference should pass to large metal surfaces. You should therefore mounting rails, shield and protective conductor bars to metal structural elements. For wall mounting in particular, installation on reference potential surfaces made of sheet steel has proved advantageous.
Page 61: Wiring Of Programmable Controllers For Emc
S5-95F Guidelines for the Planning and Installation of the Product Wiring of Programmable Controllers for EMC The following section describes: • Routing of cables within and outside cabinets • Equipotential bonding between devices • Single and double-ended connection of cable shields •...
Page 62: Equipotential Bonding
Note Lightning protection measures always require an individual assessment of the entire installation. For clarification, please consult your local Siemens Office or a company specializing in lightning protection, such as Messrs. Dehn und Söhne in Neumarkt or Messrs. Wieland in Bamberg, both Germany.
Page 63: Equipotential Bonding
S5-95F Guidelines for the Planning and Installation of the Product 3.4.2 Equipotential Bonding Between separate sections of an installation, potential differences can develop if • programmable controllers and I/O devices are connected via non-floating links, • cable shields are connected at both ends and are grounded at different parts of the system. Different AC supplies, for example, can cause potential differences.
Page 64: Shielding Of Cables And Lines
Guidelines for the Planning and Installation of the Product S5-95F 3.4.3 Shielding of Cables and Lines Shielding is a method of attenuating magnetic, electrical or electromagnetic interference fields. Interference currents on cable shields are passed to ground via the shield bar which is electrically connected to the housing.
Page 65: Special Measures For Interference-Free Operation
S5-95F Guidelines for the Planning and Installation of the Product Please observe the following points when connecting the shield: • Use metal cable clamps for securing the braided shield. The clamps must enclose the shield over a large area and provide a good contact (see Figure 3-4). •...
Page 66 Guidelines for the Planning and Installation of the Product S5-95F AC Power Connection for Programmers A power socket should be fitted in each cabinet for the AC supply to programmers. The sockets should be powered from the distribution system to which the protective conductor for the cabinet is also connected.
Page 67: Checklist For The Electromagnetically Compatible Installation Of Control Systems
S5-95F Guidelines for the Planning and Installation of the Product 3.4.5 Checklist for the Electromagnetically Compatible Installation of Control Systems Table 3-3. Checklist for Electromagnetically Compatible Installation EMC Measures Notes Connection of inactive metal parts (see section 3.3.1) Check, in particular, the connections on: •...
Page 68: Installing And Connecting The Basic System
Installing and Connecting the Basic System Basic System ........4 - 1 4.1.1 S5-95F Basic Unit .
Page 69 Figures Basic System ..........4 - 1 Mounting a Basic Unit on a Standard Mounting Rail .
Page 70: Basic System
Installing and Connecting the Basic System Installing and Connecting the Basic System This section contains the following information: for a basic system . Components required . Mounting of the devices . Wiring of the onboard 1/0s Basic System The S5-95F basic system is always of redundant design and consists of two basic units, which are interconnected via a fiber optic link.
Page 71: 4.1.1 S5-95F Basic Unit
Installing and Connecting the Basic System 4.1.1 S5-95F Basic Unit shown in Figure 4-1, an S5-95F programmable controller consists of two basic units. The following section describes mounting of one basic unit. The other basic unit is mounted in the same way.
Page 72 installing and Connecting the Basic System Removing of the basic unit: on the bottom of the controller. up and out of the standard mounting rail. Figure 4-3. Removing the Programmable Controller Use the remove, or change the programmable controller installation: following table when you install, Furthermore, handling of the 1/0 modules can result in voltage dips, which cause the S5-95F to switch to the STOP mode.
Page 73: Power Supply For The S5-95F Basic Unit
4.1.2 for the S5-95F Basic Unit Power Supply The S5-95F must be operated with an electrically isolated power supply. The rated voltage is V DC. 24 V DC Power Supply for the S5-95F If your automation system is made up of basic units 095-8FA02 you can use the same power supply for both basic units.
Page 74: Setting The Subunit Identifier And The Length Of The Fiber Optic Cable
Setting the Subunit Identifier and the Length of the Fiber Optic Cable With the quadruple DIP switch below the connector for the fiber optic cable you set the following: • Subunit identifier • Length of fiber optic cable SIMATIC S5-95F STOP STOP COPY 2 5 10m DIP switch is located below the cover Figure 4-5.
Page 75 Installing and Connecting the Basic System S5-95F How to Set the Subunit Identifier Set the subunit identifier on both subunits. One subunit is assigned identifier "A", the other identifier "B". Subunit A Subunit B Figure 4-6. Setting the Subunit Identifiers You should observe that by setting the subunit identifers you also define the addressing and wiring rules for the I/Os.
Page 76: Using The Onboard I/Os
S5-95F Installing and Connecting the Basic System Using the Onboard I/Os The S5-95F offers you the following I/Os on the two basic units: • 16 failsafe digital inputs (DI 32.0 to 33.7) • 8 failsafe digital outputs (DQ 32.0 to 32.7) •...
Page 77 Installing and Connecting the Basic System S5-95F Discrepancy Time Usually, the read result for an input signal is identical in both subunits. However, in certain situations, there can sometimes be a discrepancy. Reasons for this may be: • A hardware failure, such as failure of a sensor or input module •...
Page 78: Using The Failsafe, Onboard Digital Inputs
S5-95F Installing and Connecting the Basic System 4.2.1 Using the Failsafe, Onboard Digital Inputs The onboard digital inputs are located on the right-hand side of the 40-pin connector. They are galvanically isolated from the internal reference potential of the basic unit. How to Connect the Onboard DI Connect the 24 V DC load voltage (L+ potential to terminal 1, L- potential to terminal 20).
Page 79 Installing and Connecting the Basic System S5-95F Connection of Two-Channel Sensors (Type C) Subunit A Subunit B DIGITAL DIGITAL 12×DC 24V 16×DC 24V 12×DC 24V 16×DC 24V DI 32.2 DI 32.2 Two-channel sensor 24 V DC Figure 4-9. Connection of a Two-Channel Sensor Requirements on Sensors for Failsafe Digital Inputs Please refer to section 18.8.
Page 80: Short-Circuit Test For Sensor Lines
S5-95F Installing and Connecting the Basic System 4.2.2 Short-Circuit Test for Sensor Lines If signal cores run in mechanically stressed light plastic-sheathed cables, conductor-to-conductor short circuits can occur between the cores. Lines subject to this danger can be monitored by means of the check DQs.
Page 81 Installing and Connecting the Basic System S5-95F How to Connect Check DQs Connect the 24 V DC load voltage for the check DQs (L+ potential to terminal 11 and L- potential to terminal 20) The load voltage source must also supply the failsafe DIs. Connect the sensor lines which are to be monitored for conductor-to-conductor short circuit to different check DQs.
Page 82 S5-95F Installing and Connecting the Basic System Monitoring the Connection of Failsafe Onboard DI with Two-Channel Sensor via Check DQ (Type E) A conductor-to-conductor short circuit between the sensor lines of S1a and S1b can (physically) not occur, since both lines are laid separately. Therefore, both sensor lines can be monitored by the same check DQ.
Page 83: Using Failsafe Onboard Digital Outputs
Installing and Connecting the Basic System S5-95F 4.2.3 Using the Failsafe Onboard Digital Outputs The onboard DQs are located on the left-hand side of the 40-pin connector. They are galvanically isolated from the internal reference potential of the basic unit. When connecting the DQ, make sure that one bit is assigned different terminals in subunit "A"...
Page 84 S5-95F Installing and Connecting the Basic System Example: Failsafe Connection of an Actuator with Direct Triggering (Type K) Connect the 24 V DC load voltage (L+ potential to terminal 1, L- potential to terminal 10). With direct triggering, the load voltage for subunit A and for subunit B must be supplied by one voltage source.
Page 85: Connecting Actuators To Failsafe Digital Outputs
Installing and Connecting the Basic System S5-95F Example: Indirect Connection of Actuators via Coupling Elements (Type L) Connect the 24 V DC load voltage (L+ potential to terminal 1, L- potential to terminal 10). Connect the coupling relays to the outputs selected (see Figure 4-13). Please note, that some applications (e.g.
Page 86 Connection of diodes and/or RC networks results in the actuators being released with a time delay. Dimensioning of the components required depends on the actuator used. If you have special questions, please contact your local Siemens representative. 4-17 EWA 4NEB 812 6210-02...
Page 87: Onboard Interrupt Inputs
Installing and Connecting the Basic System S5-95F Onboard Interrupt Inputs There are two different types of onboard interrupts on the S5-95F: • Onboard OB2 interrupts • Onboard OB3 interrupts Connection and parameterization of the interrupt inputs are described in Chapter 12 ("Interrupt Processing").
Page 88: Connection Of Counter Inputs
S5-95F Installing and Connecting the Basic System 4.5.1 Connection of Counter Inputs Example: A pulse generator is to be connected to counter A (IW 36). Subunit A Subunit B 24 V DC 24 V Counter B IW 38 Counter A IW 36 Figure 4-14.
Page 89 Installing and Connecting the Basic System S5-95F Using Counters A and B Separately The counters must be parameterized in DB1 (see COM 95F manual). Counters A and B count independent of each other. When the counters reach the parameterized comparison value (counter overflow), then •...
Page 90: Scanning And Resetting The Counter Status
S5-95F Installing and Connecting the Basic System 4.5.3 Scanning and Resetting the Counter Status Table 4-8 shows the different possibilities of scanning the counters. The table is followed by a program example that shows how to enter a new comparison value. Table 4-8.
Page 91: Failure And Monitoring Of The Supply Voltages
Installing and Connecting the Basic System S5-95F Example: How to enter the new comparison value 1,280,520 for the cascading counter. Parameterize the cascading counter in DB1. Calculate the hexadecimal number of 1,280,520: Counter-Register - Cascading Counter IW 38 IW 36 bin.: 0 0 0 1 0 0 1 1 1 0 0 0 1 0 1 0 0 0 0 0 1 0 0 hex.:...
Page 92: Connector Pin Assignment Of The Onboard I/Os
S5-95F Installing and Connecting the Basic System Disconnecting the Controller and Load Voltage Supply (Basic Units 6ES5 095-8FA01 only) Note If you have different power supply units for the S5-95F and the I/Os, then first disconnect the supply to the S5-95F programmable controller and then the load voltage supply to the I/Os.
Page 93 Installing and Connecting the Basic System S5-95F Assignment of the 40-Pin I/O Connector (Right Side of Connector) Table 4-10. Assignment of the 40-Pin I/O Connector (Right Side of Connector) Connector Assignment Terminal Number Subunit A and B L+ of the 24 V DC load voltage for inputs I 32.0 to I 33.7 DIGITAL I 32.0 I 32.1...
Page 94: Expansion Of Basic System With External I/Os
Expansion of Basic System with External I/Os Assembling a Tier ........5 - 1 Multi-Tier Expansion .
Page 95 Figures Installation of a Basic Unit with External I/Os ..... . 5 - 1 Connecting the Bus Units ........5 - 2 Coding System to Prevent an Inadvertent Interchange of Modules .
Page 96: Assembling A Tier
Expansion of Basic System with External /10s Expansion of Basic System with External 1/0s You can expand the programmable controllers by using S5-1OOU external 1/0 modules. If you install bus units, and interface module on a 35-mm S5-1 OOU external modules, mount the controller, standard mounting rail and connect them to each other via the ribbon cables of the bus units.
Page 97 Expansion of Basic System with External //0s How to Mount and Remove the Bus Units Bus units are also mounted on a standard mounting rail. Mount the bus units in the same way you mounted the controller or a power supply module. of the bus units that interlock them.
Page 98 Expansion of Basic System with External //0s How to Plug Input and Output (1/0) Modules into the Bus Units set the coding element on the bus unit to Before you mount an input or output module, you must match the module type. The coding element keeps you from confusing module types when ex- changing modules.
Page 99 Expansion of Basic System with External /!0s Note on the Use of Bus Units in the S5-95F must fit it with a connector cover as a precaution Fig. 5-4). Connector cover 981 -8MA11 is required. against electrostatic discharge (see Connector cover 6ES5 981-8MA11 Figure 5-4.
Page 100: Multi-Tier Expansion
Expansion of Basic System with External 110s Multi-Tier Expansion it is not possible to have all of the modules located on one tier, then you can expand the con- for each subunit. It does not figuration up to four tiers. You may use a maximum of 8 bus units You need one interface module per tier to matter how many bus units are mounted on a tier.
Page 101: Cabinet Mounting
Expansion of Basic System with External I/Os S5-95F How to Install the Interface Module Hook the interface module to the standard mounting rail. Swing the interface module back until the slide on the bottom snaps into place on the rail. Use the flat ribbon cable to connect the module to the last bus unit.
Page 102: Horizontal Mounting
S5-95F Expansion of Basic System with External I/Os 5.3.1 Horizontal Mounting IM 316 interface module Metal plate At least 210 mm (8.3 in.) At least 210 mm (8.3 in.) Basic Basic unit unit Figure 5-6. Multi-Tier Configuration of a Subunit with the IM 316 Interface Module (6ES5 316-8MA12) Series of devices and/or cable duct At least 45 mm...
Page 103: Vertical Mounting
Expansion of Basic System with External I/Os S5-95F 5.3.2 Vertical Mounting You can also mount the standard mounting rails vertically and then attach the modules one over the other. Because heat dissipation by convection is less effective in this case, the maximum ambient temperature allowed is 40°...
Page 104: Connection Methods: Screw-Type Terminals And Crimp Snap-In
S5-95F Expansion of Basic System with External I/Os Connection Methods: Screw-Type Terminals and Crimp Snap-In Screw-Type Terminal (for the 40-Pin Connector) When using the screw-type terminals of the 40-pin connector, you can connect cables that do not exceed the maximum cross-section of 1.5 mm .
Page 105 Expansion of Basic System with External 1/0s Crimp Snap-In Terminals Bus units using the crimp snap-in connection method have exactly the same height as the S5-95F basic unit. You can connect stranded conductors with a cross-section of between 0.5 to 1.5 mmz to these terminals.
Page 106 Expansion of Basic System with External //0s S5-95F How to Disconnect the Terminal Block 5-11. in the groove on the extraction tool and pull out both the tool and the cable. Figure S-1 1. Disconnecting a Terminal 5-11 EWA 41VEB 8126210-02...
Page 107: Connection Of Failsafe I/O Modules
Expansion of Basic System with External I/Os S5-95F Connection of Failsafe I/O Modules If the failsafe onboard inputs and outputs are not sufficient for your application, you can expand the S5-95F with the following I/O modules: • Failsafe input module DI 431-8FA.. •...
Page 108: Expansion Of Basic Unit With Failsafe Digital Input Module
S5-95F Expansion of Basic System with External I/Os 5.5.1 Expansion of Basic Unit with Failsafe Digital Input Module When you use the digital input module 431-8FA.. for safety-related tasks, you must always use it in a redundant configuration (in pairs) - one module in subunit A and one module in subunit B. Eight galvanically isolated DI channels are available for each pair of modules.
Page 109 Expansion of Basic System with External I/Os S5-95F Example: Connection of Two-Channel Sensors (Type C) Insert one module into slot n of subunit A and the other module into slot n+1 of subunit B, with n being an even number between 0 and 30 (see section 6.2). Connect the 24 V DC supply voltage to terminals 1 and 2.
Page 110 S5-95F Expansion of Basic System with External I/Os 5.5.2 Expansion of Basic Unit with Failsafe Digital Output Module When you use the digital output module 450-8FAxx for safety-related tasks, you must always use it in a redundant configuration (in pairs) - one module in subunit A and one module in subunit B. Four galvanically isolated DQ channels are available for each pair of modules.
Page 111 Expansion of Basic System with External I/Os S5-95F Example: Direct Control of Actuators (Type K) Insert one module into slot n of subunit A and the other module into slot n+1 of subunit B, with n being an even number between 0 and 30 (see section 6.2). Set the selector switch of the module in subunit A to P (P output) and the selector switch of the module in subunit B to M (M output) or vice versa.
Page 112 S5-95F Expansion of Basic System with External I/Os Example: Indirect Control of Actuators via Coupling Relays with P-M Control (Type L) Insert one module into slot n of subunit A and the other module into slot n+1 of subunit B, with n being an even number between 0 and 30 (see section 6.2).
Page 113 Expansion of Basic System with External I/Os S5-95F Example: Indirect Control of Actuators via Coupling Relays with P-P Control (Type M) Insert one module into slot n of subunit A and the other module into slot n+1 of subunit B, with n being an even number between 0 and 30 (see section 6.2).
Page 114: Connection Of Non-Failsafe I/O Modules
S5-95F Expansion of Basic System with External I/Os Connection of Non-Failsafe I/O Modules When using standard S5-100U I/O modules, please note that these modules have a lower electromagnetic compatibility than failsafe modules; however, this does not have adverse effects on the safety functions of the overall system.
Page 115 Expansion of Basic System with External I/Os S5-95F Connecting Eight-Channel Output Modules (Type J) The actuators must be connected to terminal 2 via the M (negative) terminal block. This does not apply to the digital output module 8× 5 to 24-V DC/0.1 A. Example: Connecting a lamp to channel 6 (address Q 5.6) on an output module in slot 5 (see Figure 5-18).
Page 116 S5-95F Expansion of Basic System with External I/Os Connecting the Digital Input/Output Module DI/DQ 482 (Type A and J) Use only slots 0 through 7 when you plug the module into the bus unit (4 slots in each subunit). Use a 40-pin cable connector with a screw-type connection or crimp snap-in connection for wiring. The module does not have a two-wire connection.
Page 117 Expansion of Basic System with External I/Os S5-95F Example: The module is plugged into slot 0, its start address is 64.0 (see section 6.2). Inputs and outputs have the same address. A sensor is to be connected to input I64.4 and a lamp to output Q65.3.
Page 118: Power Supplies For The S5-95F
S5-95F Expansion of Basic System with External I/Os Power Supplies for the S5-95F The control for the S5-95F consists of several electrical circuits: • Internal control circuits for the S5-95F (24 V DC) • Control circuit for the onboard DI/DQ logic (24 V DC) •...
Page 119: Electrical Potentials For The Onboard And External I/Os
Expansion of Basic System with External I/Os S5-95F Electrical Potentials for the Onboard and External I/Os 5.8.1 Onboard I/Os of the S5-95F Programmable Controller The onboard I/Os of the S5-95F are galvanically isolated from the control circuit by optocouplers and allow a floating configuration.
Page 120: Potential Bonding And Galvanic Isolation Of External I/Os
S5-95F Expansion of Basic System with External I/Os 5.8.2 Potential Bonding and Galvanic Isolation of External I/Os The PLC is powered by its own control circuit. The I/Os are powered by the load circuit. The circuits can be: • Connected to the same grounding point (non-floating); or •...
Page 121 Expansion of Basic System with External I/Os S5-95F When you have a non-floating configuration, you must make certain that the voltage drop on cables does not exceed 1 V. If 1 V is exceeded, the reference potentials could change and the modules could malfunction.
Page 122: Grounded Or Non-Grounded S5-95F Configuration
S5-95F Expansion of Basic System with External I/Os Grounded or Non-Grounded S5-95F Configuration The S5-95F can be configured both with a grounded or with an isolated (non-grounded) reference potential. Configuration with Grounded Reference Potential Usually, you should configure the S5-95F with a grounded reference potential. The grounded configuration ensures a very high degree of interference immunity.
Page 123 Expansion of Basic System with External I/Os S5-95F Configuration with Non-Grounded Reference Potential In large systems, the various process areas often have different earth potentials. If you supply all circuits with an electrically isolated functional extra-low voltage, you can operate an isolated S5-95F configuration - even with non-isolated input and output modules.
Page 124 Addressing Address Assignments for Onboard I/Os ....6 - 2 Slot Numbering and Address Assignment for External I/Os ..6 - 2 Digital Modules .
Page 125 Figures Address Assignment ........6 - 1 Consecutive Numbering of Slots in a Single-Tier Configuration .
Page 126: Addressing
S5-95F Addressing Addressing The two subunits of the S5-95F are provided with various types of inputs and outputs. The inputs and outputs located on the programmable controller itself are called onboard I/Os. The other I/Os are the failsafe, external I/Os specially developed for the S5-95F and the non-failsafe standard I/Os from the S5-100U programmable controller with which you can expand your S5-95F.
Page 127: Address Assignments For Onboard I/Os
Addressing S5-95F Address Assignments for Onboard I/Os The addresses of the onboard I/Os are permanently assigned and cannot be changed by you. The assignment is shown in the following table: Byte/Word Onboard I/Os Bit Address Address Digital inputs, failsafe IB 32 to 33 I 32.0 to I 33.7 Digital outputs, failsafe QB 32...
Page 128 S5-95F Addressing If the S5-95F consists of several tiers, numbering of the expansion tiers is continued with the slot on the extreme left. Slot number in subunit A Slot number in subunit B 24 26 25 27 S5-95F S5-95F 9 11 13 basic unit basic unit Figure 6-3.
Page 129: Digital Modules
Addressing S5-95F Digital Modules Digital modules can be plugged into all slots. Only two information states ("0" or "1", "OFF" or "ON") per channel can be transferred from or to a digital module. Each channel of a digital module is displayed by a bit. This is the reason that every bit must be assigned its own number.
Page 130: Analog Modules
S5-95F Addressing Analog Modules You can plug analog modules only into slots 0 through 7. Whereas only the information "0" or "1" ("ON" or "OFF") per channel can be transferred from or to a digital module (memory requirement 1 bit), it is possible to transfer 65,536 different items of information per channel from or to an analog module.
Page 131: Combined Input And Output Modules
Addressing S5-95F Combined Input Modules and Output Modules With these modules it is possible to write data from the control program to the module and to read in data from the module to the control program. The addresses in the process image input table (PII) and process image output table (PIQ) are identical.
Page 132: Function Modules
S5-95F Addressing Table 6-2. Address Assignment (Subunit B) Slot Number in Subunit A Channel 72.0 to 88.0 to 104.0 to 120.0 to Address PII (IN) and n.0 to n.7 72.7 88.7 104.7 120.7 PIQ (OUT) Channel 73.0 to 89.0 to 105.0 to 121.0 to n+1.0 to...
Page 133: Structure Of Process Image Input And Output Tables
Addressing S5-95F Structure of Process Image Input and Output Tables Data from inputs are stored in the process image input table (PII). Data from outputs are stored in the process image output table (PIQ). The PII and the PIQ each have an area of 128 bytes in the RAM memory. The PII and the PIQ have identical structures.
Page 134 S5-95F Addressing Areas and their Addresses in the Process Image of the S5-95F Table 6-4. S5-95F: Structure of the PII and PIQ Relative Byte I/O Area Addresses 6300 6380 Digital inputs and outputs of the external I/Os 631F 639F 6320 63A0 Digital inputs and outputs of the onboard I/Os 6321...
Page 135: Accessing The Process Image Input Table (Pii)
Addressing S5-95F 6.6.1 Accessing the Process Image Input Table (PII) During a data cycle, data is read into the process image input table (PII) from input modules. This data is available to the control program for evaluation in the next program processing cycle. Access to the PII is expressed by the operand identifiers "I", "IB", or "IW"...
Page 136: Accessing The Process Image Output Table (Piq)
S5-95F Addressing 6.6.2 Accessing the Process Image Output Table (PIQ) During a program cycle, data coming from the control program to the output modules is written into the process image output table (PIQ). The data is transferred to the output modules in the following data cycle.
Page 137: Direct Access To Onboard I/Os
Addressing S5-95F 6.6.3 Direct Access to Onboard I/Os Direct access makes it possible for you to exchange information in the interrupt OBs with the I/Os without having to read/write the information from/to the PIQ or PII first. To a degree, you circumvent the PII or PIQ and directly exchange information with the inputs or outputs.
Page 138: Direct Access To External I/Os
S5-95F Addressing Note Direct accessing of the external I/Os is permissible only in OB13 (see section 6.7). If you program direct accesses to external I/Os in OB1, OB2 or OB3, the S5-95F reacts with a corresponding error message and STOP. 6.6.4 Direct Access to External I/Os External I/Os can be directly accessed only in OB 13.
Page 139: Accessing The Interrupt Piq
Addressing S5-95F Time-Controlled Program Processing Access to the interrupt PII is expressed by the "PB" or "PW" operand identifiers in a statement in a time-controlled program. The letter "L" represents the "Load" operation (see Chapter 8). Interrupt PII • Byte-by-byte reading "PB <byte address>" Example: Reading in the signal states of all channels of an 8-channel digital input module in slot 21...
Page 140: Address Assignments In Ram
S5-95F Addressing Access to the interrupt PIQ is expressed by the "PB" or "PW" operand identifiers in a statement in the time-controlled program. The letter "T" identifies the "Transfer" operation (see Chapter 8). Interrupt PIQ • Byte-by-byte writing "PB <byte address>" Example: Writing signal states to all channels of an 8-channel digital output module in slot 13 T PY 13...
Page 141 Addressing S5-95F Table 6-5. RAM in the S5-95F 62A0 Address RAM in the S5-95F Internal data 0000 62BF Internal data 62C0 00FF Analog interrupt PIQ (external I/Os) 0100 62FF Program memory Address Process Image I/O Tables 40FF 4100 6300 Internal data Digital PII (external I/Os) 5CFF 631F...
Page 142 S5-95F Addressing Table 6-5. RAM in the S5-95F (continued) Address Process Image I/Os Tables 63C0 Analog PIQ (external I/Os) 63FF 6400 Internal data 75FF Address Block Address List 7600 77FF 7800 79FF 7A00 7BFF 7C00 7DFF 7E00 7FFF 8000 Internal data FFFF 6-17 EWA 4NEB 812 6210-02...
Page 143 Addressing S5-95F The following table is a sequential listing of important system data. Table 6-6. Address Assignment in the System Data Area of the S5-95F System data word Address Meaning (hex.) 5D10 Integral real time clock 8 - 12 clock data area, status word, 5D19 error messages, compensation value 5D42...
Page 144: Introduction To Step 5
Introduction to STEP 5 Writing a Program ........7 - 1 7.1.1 Methods of Representation .
Page 145 Figures Compatibility of STEP 5 Methods of Representation ....7 - 2 Nesting ..........7 - 6 Structure of a Block Header .
Page 146: Methods Of Representation
S5-95F Introduction to STEP 5 Introduction to STEP 5 This chapter explains how to program the S5-95F. It describes how to write a program, how the program is structured, the types of blocks the program uses, and the number representation of the STEP 5 programming language.
Page 147 Introduction to STEP 5 S5-95F Each method of representation has its own special characteristics. A program block that has been programmed in STL cannot necessarily be output in CSF or LAD. The three methods of graphic re- presentation are not compatible. However, programs in CSF or LAD can always be converted to STL.
Page 148: Operand Areas
S5-95F Introduction to STEP 5 7.1.2 Operand Areas The STEP 5 programming language has the following operand areas. (inputs) Interfaces from the process to the programmable controller (outputs) Interfaces from the programmable controller to the process (flags) Memory for intermediate results of binary operations (data) Memory for intermediate results of digital operations (timers)
Page 149: Programm Structure
Introduction to STEP 5 S5-95F Example: Hard-Wired Control A signal lamp (H1) is supposed to light up when a normally open contact (S1) is acti- vated and a normally closed contact (S2) is not activated. Programmable Control The signal lamp is connected to an output (Q 32.5). The signal voltages of the two contacts are connected to two PLC inputs (I 32.0 and I 32.1).
Page 150: Structured Programming
S5-95F Introduction to STEP 5 7.2.2 Structured Programming To solve complex tasks, it is advisable to divide a program into individual, self-contained program parts (blocks). This procedure has the following advantages. • Simple and clear programming, even for large programs •...
Page 151 Introduction to STEP 5 S5-95F The program uses block calls to exit one block and jump to another. You can therefore nest pro- gram, function, and sequence blocks (see section 7.3) randomly in up to 16 levels. Note When calculating the nesting depth, note that the system program in the programmable controller can call an organization block under certain circumstances (e.g.
Page 152: Block Types
S5-95F Introduction to STEP 5 Block Types The following table lists the most important characteristics of the individual block types: Table 7-2. Comparison of Block Types Number OB1 to OB255 PB0 to PB255 SB0 to SB255 FB0 to FB255 DB0 to DB255 Length (max.) 8 KB 8 KB...
Page 153 Introduction to STEP 5 S5-95F Block Structure Each block consists of the following parts. • Block header specifying the block type, number, and length. The programmer generates the block header when it transforms the block. • Block body with the STEP 5 program or data. Synchronization Absolute pattern...
Page 154: Organization Blocks (Obs)
S5-95F Introduction to STEP 5 7.3.1 Organization Blocks (OBs) Organization blocks form the interface between the operating system and the control program. Organization blocks are handled in one of the following three ways. • One organization block (OB1) is called cyclically by the operating system. •...
Page 155 Introduction to STEP 5 S5-95F Figure 7-4 shows how to set up a structured control program. It also illustrates the significance of organization blocks. OB21/OB22 FB61 System Program Control Program Figure 7-4. Example of Organization Block Use 7-10 EWA 4NEB 812 6210-02...
Page 156: Program Blocks (Pbs)
S5-95F Introduction to STEP 5 7.3.2 Program Blocks (PBs) Self-contained program parts are programmed in program blocks. Special feature : Control functions can be represented graphically in program blocks. Call Block calls JU and JC activate program blocks. You can program these operations in all block types except data blocks.
Page 157 Introduction to STEP 5 S5-95F Block Header Besides the block header, function blocks have organizational forms that other blocks do not have. A function block's memory requirements consist of the following. • Block header as for other blocks (five words) •...
Page 158 S5-95F Introduction to STEP 5 When assigning parameters, enter all block parameter specifications. Block header Name NAME: EXAMPLE DES: IN 1 Block parameter DES: IN 2 Name Block parameter DES: OUT 1 A Data type Parameter type : A = IN 1 : A = IN 2 Control program...
Page 159 Introduction to STEP 5 S5-95F Table 7-4. Block Parameter Types and Data Types with Permissible Actual Operands Parameter Data Type Permissible Actual Operands Type I, Q for an operand with bit address x.y Inputs x.y Outputs x.y Flags for an operand with byte address Input bytes QB x Output bytes...
Page 160 S5-95F Introduction to STEP 5 The call consists of the following parts. • Call statement - JU unconditional call ( J ump U nconditional) - JC call if RLO = 1 ( J ump C onditional) • Parameter list (only if block parameters were defined in the FB) Function blocks can be called only if they have been programmed.
Page 161: Data Blocks (Dbs)
Introduction to STEP 5 S5-95F Executed PB 3 FB 5 program NAME : EXAMPLE DES: X1 I BI DES: X2 I BI DES: X3Q BI : JU First call : A = X1 NAME : EXAMPLE : A = X2 : = = X3 : I 0.0 I 0.0...
Page 162 S5-95F Introduction to STEP 5 Programming Data Blocks Begin programming a data block by specifying a block number. If the information takes up less than 16 bits, the high-order bits are padded with zeros. Data input begins at data word 0 and continues in ascending order.
Page 163: Program Processing
Introduction to STEP 5 S5-95F Function of DB1 DB1 is provided for parameterization of the S5-95F. It contains (default) values that you can either accept or change (see section 9.3). DB1 is evaluated once during start-up, in other words, either after Power ON or after a transition from STOP to RUN.
Page 164: 7.4.1 Start-Up Program Processing
S5-95F Introduction to STEP 5 7.4.1 START-UP Program Processing In the START-UP mode, the operating system of the programmable controller automatically calls up a start-up OB if the OB has been programmed. The following start-up OBs are available: • OB21 is called up for a manual cold restart. •...
Page 165 Introduction to STEP 5 S5-95F Operating mode switch STOP Power recovery RUN; Programmer command START Cold restart Clear the process image I/O table, Clear the process image I/O table, routine the non-retentive timers, counters, and the non-retentive timers, counters, flags. Interpret DB1 and flags.
Page 166: Cyclical Program Processing
S5-95F Introduction to STEP 5 7.4.2 Cyclical Program Processing The operating system calls OB1 cyclically. If you want to have structured programming, you should program only jump operations (block calls) in OB1. The blocks you call up, PBs, FBs, and SBs, should contain completed functional units in order to provide a clearer overview.
Page 167 Introduction to STEP 5 S5-95F 2. Cycle Stability The formula shows that the extension D is a non-linear function. An important criterion is therefore what additional interrupt load will be added to an existing interrupt load. Typical quotas for loading through interrupts are specified in the table below. Example: The following example shows how loading through interrupts affects the cycle.
Page 168: Maximum Response Time With Cyclical Program Processing
S5-95F Introduction to STEP 5 7.4.3 Maximum Response Time with Cyclical Program Processing The reaction to a change in the input signal is a change in the output signal. The time between the change in the input signal and the change in the output signal is called response time. To determine the response time, you must know the following times: •...
Page 169 Introduction to STEP 5 S5-95F Calculating the Maximum Response Time of the External I/Os Figure 7-12 shows a schematic of the S5-95F program processing. ExP: Data cycle of the external I/Os Besy: Operating system Delay time of : Read cycle of the onboard I/Os read the onboard DI : Write cycle of the onboard I/Os...
Page 170: Time-Controlled Program Processing
S5-95F Introduction to STEP 5 7.4.4 Time-Controlled Program Processing Time-controlled program processing can be defined as a (periodic) time signal causing the CPU to interrupt cyclic program processing and to process a specific program. Once this program has been processed, the CPU returns to the point of interruption in the cyclic program and continues processing.
Page 171 Introduction to STEP 5 S5-95F Selection of the OB13 Call-Up Interval You set the OB13 call-up interval when parameterizing the system with COM 95F. The OB13 call-up interval must fulfill the following conditions: OB13 call-up interval > OB13 runtime + maximum delay t of OB13 processing If you have programmed an OB13 call-up interval that does not fulfill the above equation, this results in a time interrupt error.
Page 172 S5-95F Introduction to STEP 5 Example: Calculation of the additional OB13 delay through failsafe SINEC L1 You have two SINEC L1 LANs with send and receive functions on both LANs. On LAN A, the longest frame sent is smaller than 20 bytes and the longest frame received is max. 40 bytes. On LAN B, the longest frame sent is max.
Page 173: Maximum Response Time With Time-Controlled Program Processing
Introduction to STEP 5 S5-95F Reading Out the Interrupt PII When OB13 is called, the signals of the external input modules are read into the interrupt PII. The interrupt PII can be scanned in OB13 by means of the L PY x or L PW x load operations (load byte x or word x of the interrupt PII in ACCU 1).
Page 174: Interrupt-Driven Program Processing
S5-95F Introduction to STEP 5 Delay time of the DI module Variable delay time Variable delay time Execution of Execution of OB 13 OB 13 OB13 OB13 call-up interval OB13 call-up interval Input signal Input signal changes; Reaction to input signal change is signal change is not change in the case of...
Page 175: Processing Blocks
Introduction to STEP 5 S5-95F Processing Blocks Earlier sections in this chapter described how to use blocks. Chapter 8 introduces all of the operations required to work with blocks. Blocks that you have already programmed can only be changed in the test mode. The individual ways to change blocks are only briefly described. The operating instructions of the programmers used explain the necessary steps in detail.
Page 176: Number Representation
S5-95F Introduction to STEP 5 You can use the COMPRESS programmer function to clean up program memory. If there is a power failure during the compress operation when a block is being shifted and block shifting can not be completed, the programmable controller remains in the STOP mode. The ”NINEU”...
Page 177 Introduction to STEP 5 S5-95F You can work with binary-coded decimals to program timers and counters in the decimal system. BCD tetrads are defined in the range of 0 to 9. Example: 12-bit timer or counter value in BCD and decimal formats Word No.
Page 178 S5-95F Introduction to STEP 5 You can use the ”LD” operation to load a binary number as a BCD number for timer and counter values. Example: Comparing a count in counter 1 with decimal number 499. The comparison value must be stored in the accumulator by means of the load operation.
Page 179 STEP 5 Operations Basic Operations ........8 - 1 8.1.1 Boolean Logic Operations .
Page 180 Figures Accumulator Structure ........8 - 10 Execution of the Load Operation .
Page 181: Step 5 Operations
S5-95F STEP 5 Operations STEP 5 Operations The STEP 5 programming language has the following three operation types: • Basic Operations include functions that can be executed in organization, program, sequence, and function blocks. • Supplementary Operations include complex functions such as substitution statements, test functions, and shift and conversion operations.
Page 182: Boolean Logic Operations
STEP 5 Operations S5-95F 8.1.1 Boolean Logic Operations Table 8-1 provides an overview of Boolean logic operations. Examples follow the table. Table 8-1. Overview of Boolean Logic Operations Operation Operand Meaning Combine AND operations through logic OR Combine the result of the next AND logic operation (RLO) with the previous RLO through logic OR.
Page 183 S5-95F STEP 5 Operations AND Operation The AND operation scans to see if various conditions are satisfied simultaneously. Example Circuit Diagram Output Q 1.0 is "1" when all three inputs are "1". I 0.0 The output is "0" if at least one input is "0". The number of scans and the sequence of the logic I 0.1 statements are at random...
Page 184 STEP 5 Operations S5-95F AND before OR Operation Example Circuit Diagram Output Q 1.0 is "1" when at least one AND condition has been satisfied. I 0.0 I 0.2 Output Q 1.0 is "0" when neither of the two AND conditions has been satisfied.
Page 185 S5-95F STEP 5 Operations OR before AND Operation Example Circuit Diagram Output Q 1.0 is "1" when one of the following conditions has been satisfied: I 0.0 I 0.2 I 0.3 • Input I 0.0 is "1". • Input I 0.1 and either input I 0.2 or I 0.3 is "1". I 0.1 Output Q 1.0 is "0"...
Page 186 STEP 5 Operations S5-95F OR before AND Operation Example Circuit Diagram Output Q 1.0 is "1" when both OR conditions have been satisfied. I 0.0 I 0.1 Output Q 1.0 is "0" when at least one OR condition has not been satisfied.
Page 187: Set/Reset Operations
S5-95F STEP 5 Operations 8.1.2 Set/Reset Operations Set/reset operations store the result of logic operation (RLO) formed in the processor. The stored RLO represents the signal state of the addressed operand. Storage can be dynamic (assignment) or static (set and reset). Table 8-2 provides an overview of the set/reset operations. Examples follow the table.
Page 188 STEP 5 Operations S5-95F Flip-Flop for a Latching Signal Output (reset dominant) Example Circuit Diagram A" 1" at input I 0.1 sets flip-flop Q 1.0 (signal state "1"). If the signal state at input I 0.1 changes to" 0", the state of output Q 1.0 is maintained, i.e., the signal is latched.
Page 189 S5-95F STEP 5 Operations RS Flip-Flop with Flags (set dominant) Example Circuit Diagram A "1" at input I 0.0 sets flip-flop F 1.7 (signal state "1"). If the signal state at input I 0.0 changes to "0", the state of flag F 1.7 is maintained, i.e., the signal is latched.
Page 190: Load And Transfer Operations
STEP 5 Operations S5-95F 8.1.3 Load and Transfer Operations Use load and transfer operations to do the following tasks. • Exchange information between various operand areas • Prepare time and count values for further processing • Load constants for program processing Information flows indirectly via accumulators (ACCU 1 and ACCU 2).
Page 191 S5-95F STEP 5 Operations Table 8-3. Overview of Load and Transfer Operations Operation Operand Meaning Load The operand contents are copied into ACCU 1 regardless of the RLO. The RLO is not affected. Transfer The contents of ACCU 1 are assigned to an operand regardless of the RLO.
Page 192 STEP 5 Operations S5-95F Load Operation During loading, information is copied from a memory area, e.g., from the PII, into ACCU 1. The previous contents of ACCU 1 are shifted to ACCU 2. The original contents of ACCU 2 are lost. Example: Two consecutive bytes (IB7 and IB8) are loaded from the PII into the accumulator.
Page 193 S5-95F STEP 5 Operations Loading and Transferring a Time (See also Timer and Counter Operations) Example Representation During graphic input, QW62 is assigned to output BI of a timer. The programmer automatically stores the corresponding load and transfer operation in the control program.
Page 194 STEP 5 Operations S5-95F Loading and Transferring a Time (Coded) Example Representation The contents of the memory location addressed with T 10 are loaded into the accumulator in BCD code. Then a transfer operation transfers the accumulator T 10 contents to the process image memory location Load addressed by QW50.
Page 195: Timer Operations
S5-95F STEP 5 Operations 8.1.4 Timer Operations The program uses timer operations to implement and monitor chronological sequences. Table 8-4 provides an overview of timer operations. Examples follow the table. Table 8-4. Overview of Timer Operations Operation Operand Meaning Pulse Timer The timer is started on the leading edge of the RLO.
Page 196 STEP 5 Operations S5-95F Updating the Timers The operating system of the S5-95F ensures that the same times or timer statuses are present in both subunits when a timer is scanned. Note The timers are divided into two areas T 0 to T 63 and T 64 to T 127. Please note that the timers are updated at different times: •...
Page 197 S5-95F STEP 5 Operations Example: KT 40.2 corresponds to 40 x 1 s. Tolerance: The time tolerance is equivalent to the time base. Examples Operand Time Interval KT 400.1 400 × 0.1 s - 0.1 s 39.9 s ... 40 s Possible settings for KT 40.2...
Page 198 STEP 5 Operations S5-95F Output of the Current Time You can use a load operation to put the current time into ACCU 1 and process it further from there (see Figure 8-4). Use the "Load in BCD" operation for digital display output. Current time in T1 L T1 LD T1...
Page 199 S5-95F STEP 5 Operations Starting a Timer Example: Schematic Representation Explanation Signal from Program The schematic shows the "n + 1" timer 17 processing cycle since timer T 17* was started. Although the timer ran out shortly after the statement "= Q 1.0", output Q 1.0 remains set.
Page 200 STEP 5 Operations S5-95F Pulse Example: Output Q 1.0 is set when the signal state at input I 0.0 changes from “0” to “1”. However, the output should not remain set longer than 5 s. Timing Diagram Circuit Diagram Signal states I 0.0 I 0.0 Q 1.0...
Page 201 S5-95F STEP 5 Operations Extended pulse Example: Output Q 1.0 is set for a specific time when the signal at input I 0.0 changes to “1”. The time is indicated in IW16. Timing Diagram Circuit Diagram Signal states I 0.0 I 0.0 Q 1.0 Time...
Page 202 STEP 5 Operations S5-95F On-Delay Example: Output Q 1.0 is set 9 s after input I 0.0 and remains set as long as the input carries signal "1". Timing Diagram Circuit Diagram Signal states I 0.0 I 0.0 Q 1.0 Time in s Q 1.0 900.0...
Page 203 S5-95F STEP 5 Operations Stored On-Delay and Reset Example: Output Q 1.0 is set 5 s after I 0.0. Further changes in the signal state at input I 0.0 do not affect the output. Input I 0.1 resets timer T 4 to its initial value and sets output Q 1.0 to zero. Timing Diagram Circuit Diagram Signal states...
Page 204 STEP 5 Operations S5-95F Off-Delay Example When input I 0.0 is reset, output Q 1.0 is set to zero after a certain delay (t). The value in FW14 specifies the delay time. Timing Diagram Circuit Diagram Signal states I 0.0 I 0.0 Q 1.0 Time in s...
Page 205: Counter Operations
S5-95F STEP 5 Operations 8.1.5 Counter Operations The programmable controller uses counter operations to handle counting jobs. Counters can count up and down. The counting range is from 0 to 999 (three decades). Table 8-5 provides an overview of the counter operations. Examples follow the table. Table 8-5.
Page 206 STEP 5 Operations S5-95F Loading a Count as an Input, Output, Flag, or Data Word Load statement: The count 410 is stored in data word DW3 in BCD code. Bits 12 to 15 are insignificant for the count. 0 1 0 0 0 0 0 1 0 0 0 0 Three-digit count...
Page 207 S5-95F STEP 5 Operations Setting a Counter “S” and Counting Down “CD” Example: When input I 0.1 is switched on (set), counter 1 is set to count 7. Output Q 1.0 is now “1”. Every time input I 0.0 is switched on (count down), the count is decremented by 1. The output is set to “0”...
Page 208 STEP 5 Operations S5-95F Resetting a Counter “R” and Counting Up “CU” Example: When input I 0.0 is switched on, the count in counter 1 is incremented by 1. As long as a second input (I 0.1) is "1", the count is reset to "0". The A C 1 operation results in signal state "1"...
Page 209: Comparison Operations
S5-95F STEP 5 Operations 8.1.6 Comparison Operations Comparison operations compare the contents of the two accumulators. The comparison does not change the accumulators' contents. Table 8-6 provides an overview of the comparison operations. An example follows the table. Table 8-6. Overview of Comparison Operations Operation Operand Meaning...
Page 210: Arithmetic Operations
STEP 5 Operations S5-95F Example: The values of input bytes IB19 and IB20 are compared. If they are equal, output Q 1.0 is set Circuit Diagram CSF/LAD IB 19 IB 20 IB 19 Q 1.0 IB 20 Q 1.0 8.1.7 Arithmetic Operations Arithmetic operations interpret the contents of the accumulators as fixed-point numbers and manipulate them.
Page 211 S5-95F STEP 5 Operations Processing an Arithmetic Operation Before an arithmetic operation is executed, both operands must be loaded into the accumulators. Note When using arithmetic operations, make sure the operands have the same number format. Arithmetic operations are executed independently of the RLO. The result is available in ACCU 1 for further processing.
Page 212: Block Call Operations
STEP 5 Operations S5-95F 8.1.8 Block Call Operations Block call operations specify the sequence of a structured program. Table 8-8 provides an overview of the block call operations. Examples follow the table. Table 8-8. Overview of Block Call Operations Operation Operand Meaning Jump unconditionally...
Page 213 S5-95F STEP 5 Operations Unconditional Block Call “JU” One block is called within another block, regardless of conditions. Example: A special function has been programmed in FB26. It is called at several locations in the program, e.g., in PB63, and processed. Program Sequence Explanation The “JU FB26”...
Page 214 STEP 5 Operations S5-95F Call a Data Block “C DB” Data blocks are always called unconditionally. All data processed following the call refers to the data block that has been called. This operation cannot generate new data blocks. Blocks that are called must be programmed or created before program scanning.
Page 215 S5-95F STEP 5 Operations Generating a Data Block Example Explanation Generate a data block with 128 data The constant fixed-point number KF + 128 words without the aid of a pro- +127 is loaded into ACCU 1. At grammer. the same time, the old contents of ACCU 1 are shifted to ACCU 2.
Page 216 STEP 5 Operations S5-95F Block End “BE” The “BE” operation terminates a block. Data blocks do not need to be terminated. “BE” is always the last statement in a block. In structured programming, program scanning jumps back to the block where the call for the current block was made.
Page 217: Other Operations
S5-95F STEP 5 Operations Conditional Block End "BEC" The "BEC" operation causes a return within a block if the previous condition has been satisfied (RLO = 1). Otherwise, linear program scanning is continued with RLO "1". Example: Scanning of program block FB20 is terminated if the RLO = "1". Program Sequence Explanation FB20...
Page 218: Supplementary Operations
STEP 5 Operations S5-95F STOP Operation The “STP” operation puts the programmable controller into the STOP mode. This can be desirable for time-critical system circumstances or when a programmable controller error occurs. After the statement is processed, the control program is scanned to the end, regardless of the RLO. Afterwards the programmable controller goes into the STOP mode with the error ID “STS”.
Page 219: Load Operation
S5-95F STEP 5 Operations 8.2.1 Load Operation As with the basic load operations, the supplementary load operation copies information into the accumulator. Table 8-10 explains the load operation. An example follows the table. Table 8-10. Load Operation Operation Operand Meaning Load A word from the system data is loaded into ACCU 1 regardless of the RLO.
Page 220: Enable Operation
STEP 5 Operations S5-95F 8.2.2 Enable Operation You can use the enable operation (FR) to execute the following operations even without an edge change. • Start a timer • Set a counter • Count up and down Table 8-11 presents the enable operation. An example follows the table. Table 8-11.
Page 221: Bit Test Operations
S5-95F STEP 5 Operations 8.2.3 Bit Test Operations Bit test operations scan digital operands bit by bit and affect them. Bit test operations must always be at the beginning of a logic operation. Table 8-12 provides an overview of these operations. Table 8-12.
Page 222 STEP 5 Operations S5-95F Example Explanation A photoelectric barrier that counts Call data block 10. piece goods is installed at input Input I 0.1 loads the count of I 0.0. After every 100 pieces, the counter 10 with the constant 0. With program is to jump to FB5 or FB6.
Page 223: Digital Logic Operations
S5-95F STEP 5 Operations 8.2.4 Digital Logic Operations Digital logic operations combine the contents of both accumulators logically bit by bit. Table 8-14 provides an overview of these digital logic operations. Examples follow the table. Table 8-14. Overview of Digital Logic Operations Operation Operand Meaning...
Page 224 STEP 5 Operations S5-95F The result of the arithmetic operation is available in ACCU 1 for further processing. The contents of ACCU 2 are not affected. Explanation Load input word IW92 into ACCU 1. IW 92 Load a constant into ACCU 1. The previous contents of ACCU 1 are shifted KH 00FF to ACCU 2.
Page 225 S5-95F STEP 5 Operations Explanation Load input word IW36 into ACCU 1. IW 36 Load a constant into ACCU 1. The previous contents of ACCU 1 are shifted KH 00FF to ACCU 2. Combine the contents of both accumulators bit by bit through logic OR. Transfer the result (contents of ACCU 1) to input word IW36.
Page 226 STEP 5 Operations S5-95F Explanation Load input word IW70 into ACCU 1. IW 70 Load input word IW6 into ACCU 1. The previous contents of ACCU 1 are IW 6 shifted to ACCU 2. Combine the contents of both accumulators bit by bit through logic EXCLUSIVE OR.
Page 227: Shift Operations
S5-95F STEP 5 Operations 8.2.5 Shift Operations Shift operations shift a bit pattern in ACCU 1. The contents of ACCU 2 are not affected. Shifting multiplies or divides the contents of ACCU 1 by powers of two. Table 8-15 provides an overview of the shift operations.
Page 228 STEP 5 Operations S5-95F Explanation Load the contents of data word DW2 into ACCU 1. DW 2 Shift the bit pattern in ACCU 1 three positions to the left. SLW 3 Transfer the result (contents of ACCU 1) to data word DW3. DW 3 Numeric Example (DW2)
Page 229: Conversion Operations
S5-95F STEP 5 Operations 8.2.6 Conversion Operations Conversion operations convert the values in ACCU 1. Table 8-16 provides an overview of the conversion operations. Examples follow the table. Table 8-16. Overview of Conversion Operations Operation Operand Meaning One's complement The contents of ACCU 1 are inverted bit by bit. Two's complement The contents of ACCU 1 are inverted bit by bit.
Page 230 STEP 5 Operations S5-95F Explanation Load the contents of input word IW12 into ACCU 1. IW 12 Invert all bits and add a “1”. Transfer the altered word to data word DW100. DW 100 Numeric Example IW 12 Form the negative value of the value in input word IW12.
Page 231: Decrement/Increment
S5-95F STEP 5 Operations 8.2.7 Decrement/Increment The decrement/increment operations change the data loaded into ACCU 1. Table 8-17 provides an overview of the decrement/increment operations. An example follows the table. Table 8-17. Decrement/Increment Operations Operation Operand Meaning Decrement Decrement the contents of the accumulator. Increment Increment the contents of the accumulator.
Page 232: Disabling/Enabling Interrupts
STEP 5 Operations S5-95F 8.2.8 Disabling/Enabling Interrupts The disable/enable interrupt operations affect interrupt-driven and time-controlled program scanning. They prevent process or time interrupts from interfering with the processing of a sequence of statements or blocks. Note that the STATUS function cannot be used on blocks which are invoked between an IA and an RA operation in the quasi-safety mode.
Page 233: Do" Operation
S5-95F STEP 5 Operations 8.2.9 "DO" Operation Use the "DO" operation to process STEP 5 statements as indexed operations. This allows you to change the parameter of an operand during control program processing (see Table 8-19). Table 8-19. Overview of the “DO” Operation Operation Operand Meaning...
Page 234 STEP 5 Operations S5-95F Figure 8-6 shows how the contents of a data word determine the parameter of the next statement. FB x Actual program :DO DW DW 12 KH=0108 DW 13 KH=0001 :DO DW :FR T :FR T Figure 8-6. Executing a “DO” Operation The following example illustrates how new parameters are generated in every program scan.
Page 235: 8.2.10 Jump Operations
S5-95F STEP 5 Operations 8.2.10 Jump Operations Table 8-20 provides an overview of the jump operations. An example follows the table. Table 8-20. Overview of Jump Operations Operation Operand Meaning JU = Jump unconditionally The unconditional jump is executed independently of conditions. Jump conditionally The conditional jump is executed if the RLO is “1”.
Page 236 STEP 5 Operations S5-95F Processing Jump Operations A symbolic jump destination (jump label) must always be entered next to a jump operation. This jump label can have up to four characters. The first character must be a letter of the alphabet. When programming, please be aware of the following items: •...
Page 237: 8.2.11 Substitution Operations
S5-95F STEP 5 Operations 8.2.11 Substitution Operations If you plan to process a program with various operands and without a lot of changes, it is advisable to assign parameters to individual operands (see section 7.3.4). If you have to change the operands, you only need to reassign the parameters in the function block call.
Page 238 STEP 5 Operations S5-95F Set/Reset Operations Table 8-22 provides an overview of the set/reset operations. An example follows the table. Table 8-22. Overview of Set/Reset Operations Operation Operand Meaning Set a formal operand (binary). RB = Reset a formal operand (binary). Assign The RLO is assigned to a formal operand.
Page 239 S5-95F STEP 5 Operations Load and Transfer Operations Table 8-23 lists the various load and transfer operations. An example follows the table. Table 8-23. Overview of Load and Transfer Operations Operation Operand Meaning Load a formal operand. Load a formal operand in BCD code. LW = Load the bit pattern of a formal operand.
Page 240 STEP 5 Operations S5-95F Timer and Counter Operations Table 8-24 provides an overview of timer and counter operations. Examples follow the table. Table 8-24. Overview of Timer and Counter Operations Operation Operand Meaning Enable a formal operand for a cold restart. (For a description, see “FT”...
Page 241 S5-95F STEP 5 Operations The following examples show how to work with timer and counter operations: Example 1: Function Block Call Program in Function Block (FB32) Executed Program =I 5 FB 32 =I 6 NAME :TIME 005.2 I 0.0 :SFD =TIM5 I 0.1 =I 5...
Page 242 STEP 5 Operations S5-95F "DO" Operation Table 8-25 and the example that follows explain the processing operation. Table 8-25. “DO” Operation Operation Operand Meaning DO = Process formal operand The substituted blocks are called unconditionally. Parameter Data Formal operands Actual Operands Permitted Type Type DB, PB, SB, FB...
Page 243: System Operations
S5-95F STEP 5 Operations System Operations System operations and supplementary operations have the following limitations: • You can program them only in function blocks. • You can program them only in the STL method of representation. Since system operations access system data, only users with very profound system knowledge should use them.
Page 244: Load And Transfer Operations
STEP 5 Operations S5-95F 8.3.2 Load and Transfer Operations Use these load and transfer operations to address the entire program memory of the programmable controller. They are used mainly for data exchange between the accumulator and memory locations that cannot be addressed by operands. Table 8-27 provides an overview of the load and transfer operations.
Page 245 S5-95F STEP 5 Operations Restrictions for the LIR, TIR and TNB Operations Command Restriction The following address areas must not be accessed: 4F00 ... 4FFF 5900 ... 5C7F 6400 ... 65FF 7000 ... 73FF 8000 ... FFFF Access permitted only to flag area and open data blocks For all source bytes: same restrictions as LIR For all destination bytes: same restriction as TIR Processing a Field Transfer...
Page 246: Arithmetic Operations
STEP 5 Operations S5-95F Caution The TIR, TRS and TNB operations are memory-changing operations with which you can access the user memory and/or the system data area. Improper use of the operations can lead to changes in the control program and to malfunctioning of the S5-95F. 8.3.3 Arithmetic Operations An arithmetic operation changes the contents of ACCU 1 by a specified value.
Page 247: Other Operations
S5-95F STEP 5 Operations 8.3.4 Other Operations Table 8-29 provides an overview of the remaining system operations. Table 8-29. The "TAK" and "STS" Operations Operation Operand Meaning Swap accumulator contents Swap the contents of ACCU 1 and ACCU 2 regardless of the RLO.
Page 248: Condition Code Generation
STEP 5 Operations S5-95F Condition Code Generation The processor of the programmable controller has the following three condition codes: • CC 0 • CC 1 • (overflow) The following operations affect the condition codes. • Comparison operations • Arithmetic operations •...
Page 249 S5-95F STEP 5 Operations Condition Code Generation for Digital Logic Operations Digital logic operations set CC 0 and CC 1. They do not affect the overflow condition code (see Table 8-32). The setting depends on the contents of the ACCU after the operation has been pro- cessed.
Page 250: Sample Programs
STEP 5 Operations S5-95F Sample Programs Sections 8.5.1 through 8.5.3 provide a few sample programs that you can enter and test in all three methods of representation on a programmer. 8.5.1 Momentary-Contact Relay/Edge Evaluation Example Circuit Diagram On each leading edge of the signal at input I 0.0, the AND condition “A I 0.0 and AN F 64.0”...
Page 251 S5-95F STEP 5 Operations Timing Diagram Circuit Diagram Signal states I 0.0 I 0.0 Q 1.0 Q 1.0 Time I 0.0 & I 0.0 F 1.0 F 1.1 F 1.0 F 1.1 F 1.0 F 1.1 F 1.0 F 1.1 I 0.0 I 0.0 NOP 0...
Page 252: Clock/Clock-Pulse Generator
STEP 5 Operations S5-95F 8.5.3 Clock/Clock-Pulse Generator This subsection describes how to program a clock-pulse generator. Example: A clock-pulse generator can be implemented using a self-clocking timer that is followed in the circuit by a binary scaler. Flag F 2.0 restarts timer T 7 each time it runs down, i.e., flag F 2.0 is “1”...
Page 253: Blocks And Their Functions
Blocks and Their Functions Organization Blocks ........9 - 1 9.1.1 Scan Time Trigger (OB31)
Page 254 Figures Calling Up the OB251 PID Algorithm ......9 - 3 Block Diagram of the PID Controller .
Page 255: Blocks And Their Functions
S5-95F Blocks and Their Functions Blocks and Their Functions The STEP 5 programming language offers you various blocks, such as organization blocks (OBs), program blocks (PBs), function blocks (FBs) and data blocks (DBs). Sequence blocks (SBs) are available for programming of sequencers. The following chapter describes: •...
Page 256 Blocks and Their Functions S5-95F 9.1.1 Scan Time Trigger (OB31) By means of a scan time monitor (hardware watchdog) you monitor the time sequence of cyclic program processing. If program processing takes longer than the cycle monitoring time of 680 ms set via the hardware, then the S5-95F goes to STOP.
Page 257 S5-95F Blocks and Their Functions 9.1.4 PID Algorithm (OB 251) A PID algorithm is integrated in the operating system of the S5-95F. OB251 helps you use this algorithm to meet your needs. Before calling up OB251, you must first open a data block called the controller DB. It contains the controller parameters and other controller specific data.
Page 258 Blocks and Their Functions S5-95F BGOG STEU STEU Bit 5 Bit 2 Sum- ming unit Lim- iter Manual function STEU STEU STEU STEU Bit 1 Bit 0 Bit 3 Bit 4 YH, dYH BGUG Figure 9-2. Block Diagram of the PID Controller Table 9-3.
Page 259 S5-95F Blocks and Their Functions Table 9-4. Description of the Control Bits in Control Word "STEU" Control Signal Name Description State AUTO Manual mode The following variables are updated in Manual mode: 1) X , XW and PW 2) XZ , XZ and PZ , when STEU bit 1=1...
Page 260 Blocks and Their Functions S5-95F Correction Rate Algorithm The relevant correction increment dY is computed at instant t= k TA according to the following • formula: • Without feedforward control (D11.5=1); XW is forwarded to the differentiator (D11.1=0) =K [(XW - XW ) R+TI + (TD (XW...
Page 261 S5-95F Blocks and Their Functions At instant t , manipulated variable Y is computed as follows: Initializing the PID Algorithm OB251's interface to its environment is the controller DB. All data needed to compute the next manipulated variable value is stored in this DB. Each controller must have its own controller data block.
Page 262 Blocks and Their Functions S5-95F Table 9-5. Format of the Controller DB (Continued) Data Word Name Comments Control word (bit pattern) STEU Value for manual operation (- 2047 to +2047) Upper limit value (- 2047 to +2047) BGOG Lower limit value (- 2047 to +2047) BGUG Actual value (- 2047 to +2047) Disturbance variable (- 2047 to +2047)
Page 263 S5-95F Blocks and Their Functions Selecting the Sampling Interval In order to be able to use the known analog method of consideration for digital control loops too, do not select a sampling interval that is too large. Experience has shown that a TA sampling interval of approximately 1/10 of the time constant produces a control result comparable to the equivalent analog result.
Page 264 Blocks and Their Functions S5-95F Example for the Use of the PID Controller Algorithm: A PID controller is supposed to keep an annealing furnace at a constant temperature. The temperature setpoint is entered via a potentiometer. The setpoints and actual values are acquired via analog channels 0 (IW 40) and 1 (IW 42) and forwarded to the controller.
Page 265 S5-95F Blocks and Their Functions Calling the controller in the program: OB13 Description Process controller : JU FB NAME : CONTROLLER 1 The controller's sampling interval depends on the time base used to call OB13 (set in DB1). When selecting the sampling interval, take into account the encoding time of the onboard analog inputs.
Page 266 Blocks and Their Functions S5-95F FB10 (Continued) STL Explanation Read setpoint : JU FB 250 NAME : RLG: AI Slot number KF +8 Channel no. 1, fixed-point bipolar KNKT KY 1,6 Upper limit for setpoint KF +2047 Lower limit for setpoint KF - 2047 No selective sampling EINZ...
Page 267 S5-95F Blocks and Their Functions DB30 Explanation 0000; K parameter (here=1), factor 0.001 +01000; (value range: - 32768 to 32767) 0000; R parameter (here=1), factor 0.001 +01000; (value range: - 32768 to 32767) 0000; TI=TA/TN (here=0.01), factor 0.001 +00010; (value range: 0 to 9999) 0000;...
Page 268 Blocks and Their Functions S5-95F Integrated Function Blocks (FBs) The S5-95F has integrated function blocks. Function blocks FB240 to FB243 and FB252 and FB 255 are failsafe, function blocks FB250 and FB251 are reaction-free. These blocks can be called in the control program with the commands "JU FB x"...
Page 269 S5-95F Blocks and Their Functions 9.2.3 Multiplier : 16 - FB242 - Use function block FB 242 to multiply one fixed-point binary number (16 bits) by another The product is represented by a fixed-point binary number (32 bits) The result is also scanned for zero. An eight-bit number must be transferred to a 16-bit word prior to multiplication.
Page 270: Analog Value Conditioning Blocks - Fb250 And Fb251
Blocks and Their Functions S5-95F 9.2.5 Analog Value Conditioning Blocks - FB250 and FB251 - Function block FB250 reads in an analog value from an analog input module and outputs a value XA in the scale range specified by the user. Function block FB251 allows you to output analog values to analog output modules.
Page 271 S5-95F Blocks and Their Functions Execution of the Background Test All test components of the background test are stored in a list and are automatically called and executed by the operating system. Processing of the tests is organized so that all tests are executed once per hour.
Page 272 Blocks and Their Functions S5-95F Table 9-10. Calling and Parameter Assignments of FB252 Parameter Meaning Type Assignment AUFT Number of test I/BY - CPU : JU FB 252 component - Operating system comparison NAME : AGF:TEST - RAM with STEP 5 objects AUFT : - Onboard DI - Onboard DQ...
Page 273 S5-95F Blocks and Their Functions Table 9-10. Calling and Parameter Assignments of FB252 (continued) Parameter Meaning Type Assignment Execution of test if it has I/BI = Execute test unconditionally not yet been executed in = Execute test if it has not yet been the current cycle executed in the current test cycle EINZ...
Page 274 Blocks and Their Functions S5-95F Execution Times of FB252 Table 9-11. Execution Times of FB252 Test Component Parameter AUFT Execution Times approx. 87 ms Operating system approx. 20 s comparison Due to its long execution time, the test can be called only with parameter EINZ = 1 RAM with STEP 5 objects approx.
Page 275 S5-95F Blocks and Their Functions In DB10 you have stored the parameters for calling FB252 as follows: DB10 Explanation 0F00; Short-circuit test (DL0=0F H ) 0000; 0000 0100 0000 0000; 0000; You call FB252 in OB1. Here in OB1 you have the call JU FB10. In FB10 you have the call for FB252.
Page 276: Depassivation Block - Fb255
Blocks and Their Functions S5-95F Special Characteristic of the DQ Test During the DQ test, the S5-95F briefly resets the outputs to be tested. If you wish to call up the DQ test by means of function block FB 252, then please refer to section 4.3. 9.2.7 Depassivation Block - FB255 -...
Page 277 S5-95F Blocks and Their Functions Depassivation Routine Note Call FB255 only in the cyclic program (OB1). Generate an independent routine for depassivation in your control program. In this routine, you make sure that the system cannot assume any impermissible statuses during depassivation of the I/Os. Special attention should be paid to the statuses of the digital outputs.
Page 278: Parameterizing Internal Functions In Db1
Blocks and Their Functions S5-95F Parameterizing Internal Functions in DB1 The S5-95F offers functions that you must program according to your requirements. These functions are: • Using interrupt inputs • Using counter inputs • Using the integral real-time clock • Using failsafe onboard inputs and outputs •...
Page 279: Configuration And Default Settings For Db1
S5-95F Blocks and Their Functions 9.3.1 Configuration and Default Settings for DB1 Data block DB1 required for system parameterization is already integrated in the S5-95F programmable controller with preset values (default parameters). If you use failsafe external I/Os, the default parameters are added automatically. DB1 remains valid until you modify it with COM 95F (see COM 95F manual).
Page 280 Blocks and Their Functions S5-95F Table 9-12. Parameter Blocks and Their IDs (S5-95F) Block ID Explanation/Default Setting Start ID 'DB1 '; Onboard hardware interrupt: Parameter block for asynchronous interrupt 'OBHI: '; processing (see Chapter 12) Onboard I/Os: Parameter block for the redundant onboard inputs and outputs 'OBP: ';...
Page 281: How To Assign Parameters In Db1 Without Com 95F
S5-95F Blocks and Their Functions 9.3.2 How to Assign Parameters in DB1 without COM 95F Use the following steps to change or expand the preset values of DB1: Display the default DB1 on the programmer. Position the cursor on the desired parameter block. Change or expand the parameters.
Page 282 Blocks and Their Functions S5-95F In the following section are all of the rules that have to be followed if you want to change or expand entire parameter blocks in DB1. Follow these steps or the programmable controller will not understand what you have entered.
Page 283: How To Recognize And Correct Parameter Errors
S5-95F Blocks and Their Functions Steps 1 through 7 present the minimal requirements for setting the parameters Beyond that, there are additional rules that make it easier for you to assign parameters. For example: • You have the ability to add comments. •...
Page 284: Transferring Changed Db1 Parameters To The S5-95F Programmable
Blocks and Their Functions S5-95F 9.3.5 Transferring Changed DB1 Parameters to the S5-95F Programmable Controller DB1 determines to a limited extent the system parameters of the S5-95F. The S5-95F reads DB1 only once during startup. If you assign new parameters to DB1 (in the test mode), then the S5-95F must read DB1, as otherwise the changed parameters do not become valid.
Page 285: Reference Guide For Setting Parameters In Db1
S5-95F Blocks and Their Functions 9.3.6 Reference Guide for Setting Parameters in DB1 The following table gives you an overview of possible DB1 parameters. You require this table if you wish to evaluate the parameters entered on the programmer without using COM 95F. Parameter Argument Explanation...
Page 286 Blocks and Their Functions S5-95F Parameter Argument Explanation Block ID: OBSI Onboard software interrupt Default setting OB3 interrupt processing with negative edge at input. 32.X S N The short discrepancy time (S) applies for the interrupt inputs. 33.X S N The inputs are, however, not enabled (N).
Page 287 S5-95F Blocks and Their Functions Parameter Argument Explanation Block ID: OBDE Discrepancy time for onboard inputs Default setting All (non-interrupt) onboard inputs have the short discrepancy 32.X S time as default setting. 33.X S Permissible changes The discrepancy time can be changed for each onboard input. 32.x t 33.x t Permissible range of values...
Page 288 Blocks and Their Functions S5-95F Parameter Argument Explanation Block ID: OBC Onboard counter Default setting Counters register pulses with positive edge at the counter input. Counters are assigned to signal group 0 and not yet enabled. Permissible changes Counters are enabled by parameterizing of a signal group and a comparison value.
Page 289 S5-95F Blocks and Their Functions Parameter Argument Explanation Block ID: SIG Define signal groups Default setting When an error is recognized, all signal groups (0 to 31) SGRP respond with PLC STOP Permissible changes You can assign each signal group its own error response. SGRP Permissible range of values Signal group z:...
Page 290 Blocks and Their Functions S5-95F Parameter Argument Explanation Block ID: EXDE Discrepancy time for external DI Default setting Discrepancy time for all redundant external DIs: one OB1 cycle Y.X 1L1 Permissible changes You can assign individual bits or bytes a different discrepancy x.y t time Byte address x:...
Page 291 S5-95F Blocks and Their Functions Parameter Argument Explanation Block ID: SL1B Non-failsafe SINEC L1 at subunit B Default setting Coordination bytes, send and receive mailboxes are not assigned default parameters. Permissible changes If you use a SINEC L1 data bus, you must define the location of the coordination byte and the send and receive mailboxes.
Page 292 Blocks and Their Functions S5-95F Parameter Argument Explanation Block ID: SL1S Failsafe SINEC L1 Default setting The failsafe SINEC L1 data bus is not activated. User valid bit Data path 1, send Data path 1, receive Data path 2, send Data path 2, receive Slave number and mode of destination slave for data path 1 SNTS1...
Page 293 S5-95F Blocks and Their Functions Parameter Argument Explanation Block ID: SDP System-dependent parameter Default setting System identification number (here 0) SYID Data blocks with constant contents (here DB200 to DB251) DBCON 200 251 DBs with constant contents must not be changed in RUN mode PLC cycle statistics Scan time monitoring through software watchdog CYST...
Page 294 Blocks and Their Functions S5-95F Parameter Argument Explanation Block ID: CLP Integral real-time clock (clock parameter) Default setting Integral real-time clock is not activated Location of the status word Setting the prompting time Updating the clock during PLC STOP Saving the clock time after the last change from RUN to STOP or POWER OFF Correction factor Permissible changes...
Page 295: The Integral Real-Time Clock
The Integral Real-Time Clock 10.1 Operating Principle and Parameterization of the Integral Real-Time Clock ........10- 1 10.1.1 Setting the Clock Parameters in DB1 .
Page 296 Figures 10-1 Accessing the Clock Data Area ....... 10- 3 Tables 10-1 Clock Data in the Clock Data Area .
Page 297: Real-Time Clock
S5-95F The Integral Real-Time Clock The Integral Real-Time Clock The S5-95F is provided with an integral real-time clock, which offers you the possibility of controlling the process sequences. The clock data must, however, not be used to initiate safety functions. 10.1 Operating Principle and Parameterization of the Integral Real-Time Clock...
Page 298: 10.1.3 Transfer And Battery Backup Of Clock Parameters
The Integral Real-Time Clock S5-95F 10.1.3 Transfer and Battery Backup of Clock Parameters Transfer of Clock Parameters from DB1 The clock parameters are transferred from DB1 to the S5-95F only if you have carried out a manual S5-95F overall reset in advance. The clock parameters are transferred after the first transition from STOP to RUN.
Page 299: Structure Of The Clock Data Area
S5-95F The Integral Real-Time Clock 10.2 Structure of the Clock Data Area Convention: You must store the location of the clock data area in DB1. To enable you to set the clock also in the safety mode via the programmer, we recommend you to store the clock data area and the status word in the parameter control DB.
Page 300 The Integral Real-Time Clock S5-95F When you set the clock, you have to transfer only the data needed to implement a particular function. For example, if you want to change only the clock function data, you do not have to enter data for the time prompt function or for the operating hours counter.
Page 301 S5-95F The Integral Real-Time Clock Make certain you are aware of the following points when you make inputs into the clock data area. • Entries into the clock data area must be in BCD code. • The clock settings you enter must be within the range defined in Table 10-2. Table 10-2.
Page 302: Structure Of The Status Word And How To Scan It
The Integral Real-Time Clock S5-95F 10.3 Structure of the Status Word and How to Scan it You can scan the status word to identify errors in the entered settings. You can deliberately change certain bits in the status word to enable or disable transfer or read operations. You can use designated flag bits to govern the clock’s behavior when the programmable controller is switched from the RUN to the STOP mode or during Power OFF.
Page 303 S5-95F The Integral Real-Time Clock Tables 10-3 through 10-6 provide you with information about the significance of the signal states of the respective flags. Clock Flags Table 10-3. Significance of Bits 0, 1 and 2 of the Status Word Bit Number Signal State Meaning Error in setting entry...
Page 304 The Integral Real-Time Clock S5-95F Operating Hours Counter Flags Table 10-5. Significance of the Operating Hours Counter Flag (Bits 8, 9, and 10 of the Status Word) Bit Number Signal State Meaning Error in setting entry No error in setting entry Enable the operating hours counter Disable the operating hours counter Transfer the settings for the operating hours counter...
Page 305: Real-Time Clock
S5-95F The Integral Real-Time Clock 10.4 Using the Programmer to Read and Set the Integral Real-Time Clock The following section describes reading and setting of the integral real-time clock via the programmer with the "Block Output" function. In the following, we assume that the clock data area and the status word have been stored in the parameter control DB and that data block DB1 has been parameterized correspondingly.
Page 306: Control Program
The Integral Real-Time Clock S5-95F 10.5 Programming the Integral Real-Time Clock in the Control Program In the following sections, we use examples to describe how you can set and evaluate the integral real-time clock via the control program. Convention: In the following examples, we assume that the parameter set for the clock has already been stored in DB1;...
Page 307 S5-95F The Integral Real-Time Clock FB10 STL Explanation NAME :SET CLOCK SETTING THE CLOCK :WDAY I/Q/D/B/T/C: I BI/BY/W/D: BY :DAY I/Q/D/B/T/C: I BI/BY/W/D: BY :MON I/Q/D/B/T/C: I BI/BY/W/D: BY :YEAR I/Q/D/B/T/C: I BI/BY/W/D: BY :HOUR I/Q/D/B/T/C: I BI/BY/W/D: BY :AMPM I/Q/D/B/T/C: I BI/BY/W/D: BI :MIN...
Page 308 The Integral Real-Time Clock S5-95F FB10 STL (Continued) Explanation :TBN 22.2 HAVE SETTINGS BEEN TRANSFERRED? =M002 IF YES, JUMP TO M002 =ERR SET ERROR BIT IF THERE ARE ERRORS :BEU M002 :TBN 22.0 WERE THERE ERRORS WHILE ENTERING SETTINGS? =ERR IF NO, RESET ERROR BIT :BEC IF NO ERROR, THEN BEC...
Page 309 S5-95F The Integral Real-Time Clock FB13 STL Explanation NAME :READ CLOCK READING THE CLOCK :WDAY I/Q/D/B/T/C: BI/BY/W/D/:BY :DAY I/Q/D/B/T/C: BI/BY/W/D/:BY :MON I/Q/D/B/T/C: BI/BY/W/D/:BY :YEAR I/Q/D/B/T/C: BI/BY/W/D/:BY :HOUR I/Q/D/B/T/C: BI/BY/W/D/:BY :AMPM I/Q/D/B/T/C: BI/BY/W/D/:BI :MIN I/Q/D/B/T/C: BI/BY/W/D/:BY :SEC I/Q/D/B/T/C: BI/BY/W/D/:BY :MODE I/Q/D/B/T/C: BI/BY/W/D/:BI WEEKDAY =WDAY...
Page 310: Storing The Updated Time/Date After A Run To Stop Or Run To Power Off Transition
The Integral Real-Time Clock S5-95F 10.5.2 Storing the Updated Time/Date after a RUN to STOP or RUN to POWER OFF Transition When the S5-95F leaves the RUN mode, it stores the time of terminating program processing in the clock data area in DW18 to DW 21. The S5-95F stores the time of the last RUN to STOP or RUN to POWER OFF transition always in the clock data area if •...
Page 311 S5-95F The Integral Real-Time Clock Prompt Time Sequence • Bit 13 in the status word is set after the prompt time has elapsed. • Bit 13 remains set until you reset it in the control program. • The prompt time can be read at any time. Caution If the prompt time is reached in the STOP mode or during Power OFF, the prompt time cannot be evaluated.
Page 312 The Integral Real-Time Clock S5-95F FB11 STL Explanation NAME :SET PROMPT TIME SETTING THE PROMPT TIME :WDAY I/Q/D/B/T/C: I BI/BY/W/D: BY :DATE I/Q/D/B/T/C: I BI/BY/W/D: BY :MON I/Q/D/B/T/C: I BI/BY/W/D: BY :HOUR I/Q/D/B/T/C: I BI/BY/W/D: BY :AMPM I/Q/D/B/T/C: I BI/BY/W/D: BI :MIN I/Q/D/B/T/C: I BI/BY/W/D: BY...
Page 313 S5-95F The Integral Real-Time Clock FB11 STL (continued) Explanation =HOUR STORE VALUE FOR HOURS =AMPM IF AM/PM = 1 (AFTERNOON) AND =MODE 12-HOUR MODE IS SET, THE =MORN CORRESPONDING BIT IN THE CLOCK KH 0080 DATA AREA IS SET MORN :T =MIN STORE VALUE FOR MINUTES =SEC...
Page 314: Setting The Operating Hours Counter
The Integral Real-Time Clock S5-95F 10.5.4 Setting the Operating Hours Counter You can enable the operating hours counter with bit 9 of the status word. This allows you to find out, for example, for how many hours a motor has been in operation. The operating hours counter is active only in the RUN mode.
Page 315 S5-95F The Integral Real-Time Clock Example: Setting the operating hours counter The status of input I 0.7 determines whether the operating hours counter values are transferred. You must transfer these values to flag bytes FY136 to FY140 before setting input I 0.7 (not implemented in the example program).
Page 316 The Integral Real-Time Clock S5-95F FB12 STL Explanation NAME :SET OPER. HOURS COUNTER SETTING THE OPERATING HOURS COUNTER :SEC I/Q/D/B/T/C: BI/BY/W/D: :MIN I/Q/D/B/T/C: BI/BY/W/D: :HOUR0 I/Q/D/B/T/C: BI/BY/W/D: :HOUR2 I/Q/D/B/T/C: BI/BY/W/D: :HOUR4 I/Q/D/B/T/C: BI/BY/W/D: :ERR I/Q/D/B/T/C: BI/BY/W/D: DB 200 PARAMETER CONTROL DB 20.2 START MONITORING TIME KT 200.0...
Page 317 S5-95F The Integral Real-Time Clock Reading the Current Operating Hours Counter The current data is stored in words 12 to 14 of the clock data area. You can use load operations to read out the data. Example: Reading the operating hours counter You need to switch off a machine for inspection after every 300 hours of operation.
Page 318: Analog Value Processing
Analog Value Processing 11.1 Analog Input Modules (Type P) ......11- 1 11.2 Connecting Current and Voltage Sensors to Analog Input Modules .
Page 319 Figures 11.1 Two-Wire Connection of Voltage Sensors (6ES5 464-8MC11) ..11- 2 11.2 Two-Wire Connection for Current Sensors (6ES5 464-8MD11) ..11- 2 11.3 Connection of Two-Wire Transducers (6ES5 464-8ME11) .
Page 320: Analog Value Processing
S5-95F Analog Value Processing Analog Value Processing For analog value processing, you can use all analog modules of the S5-100U series. Safety-related analog value processing is not possible with these modules. The following sections describe: • Connection of sensors and actuators •...
Page 321: Two-Wire Connection Of Voltage Sensors
Analog Value Processing S5-95F 11.2.1 Two-Wire Connection of Voltage Sensors For the connection of voltage sensors, you can use the analog input module 464-8MC11 for voltages of ±10 V: Figure 11-1 shows the two-wire connection of voltage sensors. Figure 11-1. Two-Wire Connection of Voltage Sensors (6ES5 464-8MC11) 11.2.2 Two-Wire Connection of Current Sensors You can use module 464-8MD11 for the two-wire connection of current sensors.
Page 322: Connection Of Two-Wire And Four-Wire Transducers
S5-95F Analog Value Processing 11.2.3 Connection of Two-Wire and Four-Wire Transducers Use the 24-V inputs 1 and 2 of analog input module 464-8ME11 to supply the two-wire transducers. The two-wire transducer converts the supplied voltage to a current of 4 to 20 mA. For wiring connections, see Figure 11-3.
Page 323 Analog Value Processing S5-95F If you use a four-wire transducer connect it as shown in Figure 11-4. Four-wire transducer Figure 11-4. Connection for Four-Wire Transducers (6ES5 464-8ME11) Four-wire transducers require their own power supply. Connect the “+” pole of the four-wire transducer to the corresponding “-”...
Page 324: Start-Up Of Analog Input Modules
S5-95F Analog Value Processing 11.3 Start-Up of Analog Input Modules Set the intended operating mode using the switches on the front panel of analog input modules. These switches are located on the right side at the top of the front panel of the module. Power supply Set the switch to the available power supply frequency.
Page 325: Analog Value Representation Of Analog Input Modules
Analog Value Processing S5-95F 11.4 Analog Value Representation of Analog Input Modules Each analog process signal has to be converted into a digital format, to be stored in the process image input table (PII). The analog signals are converted into a binary digit that is written in two bytes: Analog values are represented in two's complement.
Page 326 S5-95F Analog Value Processing Table 11-4. Analog Input Module 464-8ME11, 4x4 to 20 mA (Absolute Value Representation) Measured Value Units High Byte Low Byte Range in mA >4095 > 32.769 0 1 1 1 1 1 1 1 1 1 1 1 1 0 0 1 Overflow 4095 31.992...
Page 327: Analog Output Modules (Type W)
Analog Value Processing S5-95F 11.5 Analog Output Modules (Type W) Analog output modules convert the bit patterns that are output by the CPU into analog output voltages or currents. 11.5.1 Connection of Loads to Analog Output Modules No adjustments are necessary if you want to connect loads to the analog outputs. Check the following items before connecting loads: •...
Page 328: Analog Value Representation Of Analog Output Modules
S5-95F Analog Value Processing Figure 11-6 shows how to connect loads to the current outputs of the module 470-8MB12 (2 x ±20 mA). Key: Analog output "Current" Chassis ground terminal of the analog unit 24 V DC (4/8) (6/10) Terminal assignment Terminals Figure 11-6.
Page 329 Analog Value Processing S5-95F Tables 11-6 and 11-7 show the voltage and currents assigned to the bit patterns. Table 11-6. Output Voltages and Currents for Analog Output Modules (Fixed-Point Number Bipolar) Output Values Units High Byte Low Byte Range in V in mA 1280 12.5...
Page 330: Analog Value Conversion: Function Blocks Fb250 And Fb251
S5-95F Analog Value Processing 11.6 Analog Value Conversion: Function Blocks FB250 and FB251 11.6.1 Reading in and Scaling an Analog Value - FB250 - Function block FB250 reads in an analog value from an analog input module and outputs a value XA in the scale range specified by the user.
Page 331 Analog Value Processing S5-95F Example: Display of Tank Make-Up Quantity The make-up of a cylindrical tank holding 30 m is to be shown on a 3-digit display. The individual digits must be set in BCD. The level of the liquid in the tank is sensed by a SONAR-BERO®, range 80 to 600 cm, with analog output (see Catalog NS3).
Page 332 S5-95F Analog Value Processing Explanation Unconditional call FB250 JU FB 250 NAME : RLG:AI Slot 0 Channel 0, channel type 3 KNKT : 0.3 Upper limit: 30.0 m : 300 Lower limit: 0.0 m No meaning EINZ : FY0 Make-up quantity stored in flag word 1 as fixed-point number : FY2 “1”, if wire break :F0.0...
Page 333 Analog Value Processing S5-95F 11.6.2 Output of Analog Value - FB251 - Analog values can be output to analog output modules using this function block. In doing so, values from the range between the lower limit (UGR) and high limit (OGR) parameters are converted to the nominal range of the module in question.
Page 334 S5-95F Analog Value Processing The tank contents are determined from the make-up quantity. Explanation Maximum tank capacity L KF +300 Make-up quantity L FW 1 Calculate difference Store tank contents in FW20 T FW 20 The UGR and OGR parameters of FB 251 refer to the nominal range of the analog output module. For this reason, the UGR parameter must be assigned the value -30.0.
Page 335: Interrupt Processing
Interrupt Processing 12.1 Using Onboard Interrupt Inputs ......12- 1 12.2 Asynchronous Interrupt Processing in OB2 ....12- 2 12.2.1 Programming OB2 .
Page 336 Figures 12-1 Connecting a Failsafe Sensor to an Interrupt Input ....12- 7 12-2 Connecting a Failsafe Sensor and a Line Monitor to an Interrupt Input .
Page 337: Interrupt Processing
S5-95F Interrupt Processing Interrupt Processing This section covers the following: • Interrupt inputs on the S5-95F • How interrupt inputs are connected • How the characteristics for interrupt inputs are defined in DB1 • What happens "internally" during interrupt processing •...
Page 338: Asynchronous Interrupt Processing In Ob2
Interrupt Processing S5-95F 12.2 Asynchronous Interrupt Processing in OB2 The S5-95F is equipped with four separate failsafe interrupt inputs (I 59.0 to I 59.3) which trigger asynchronous interrupt processing when there is a change (falling edge) in a process signal. Asynchronous interrupt processing means that each subunit invokes OB2 as soon as it detects a change in the signal at an interrupt input, without regard to the other subunit's signals.
Page 339 S5-95F Interrupt Processing Interrupt Generation An interrupt is triggered by a negative edge at an enabled interrupt input. In the event of an interrupt, the S5-95F automatically invokes OB2. If OB2 has not been programmed, the cyclic or time-controlled program is immediately resumed. The cyclic program can be interrupted after each STEP 5 statement.
Page 340: Programming Ob2
Interrupt Processing S5-95F 12.2.1 Programming OB2 The primary objective of OB2 interrupt processing is the fastest possible resetting of an onboard DQ in response to changes at an interrupt input. Operations Permissible in OB2 Table 12-4. Operations Permissible in OB2 Operation Operand Description/Comments...
Page 341 S5-95F Interrupt Processing Communication and Diagnostic Bytes for Responses to OB2 Interrupts Input bytes IB 56 to IB 58 have been reserved in order to make it possible to respond to interrupts without invoking OB2. Additional Communication and Diagnostic Bytes for Processing Interrupts with Routines Other than OB2 Table 12-5.
Page 342: Programming Interrupt Responses In Ob2
Interrupt Processing S5-95F 12.2.2 Programming Interrupt Responses in OB2 Interrupt-driven program scanning is possible only when the following prerequisites have been fulfilled: • Interrupt inputs have been initialized in DB1 • The S5-95F must be in the "POWER ON" state and set to "RUN" •...
Page 343: Connecting Interrupt Inputs
S5-95F Interrupt Processing 12.2.3 Connecting Interrupt Inputs Example 1: A single-channel failsafe sensor S1 is to be connected to interrupt I 59.0 (type B). Subunit A Subunit B 24 V DC 24 V DC I 59.0 I 59.0 24 V DC M (ground) M (ground) Figure 12-1.
Page 344 Interrupt Processing S5-95F Example 3: Two sensors, S1a and S1b, are to be connected to interrupt input I 59.0 (type C). Subunit A Subunit B 24 V DC 24 V DC I 59.0 I 59.0 24 V DC M (ground) M (ground) Figure 12-3.
Page 345: Synchronous Interrupt Processing In Ob3
S5-95F Interrupt Processing 12.3 Synchronous Interrupt Processing in OB3 Synchronous interrupt processing means that the signal state change must take place in both subunits before OB3 is invoked. Execution of OB3 takes place at the same time (i.e. is synchronous) in both subunits. All onboard inputs (I 32.0 to I 33.7 and I 59.0 to I 59.3) may also be used as synchronous interrupt inputs.
Page 346 Interrupt Processing S5-95F Interrupt Priority OB3 can interrupt the cyclic or time-controlled program after each STEP 5 statement. If OB3 has not been programmed, the cyclic or time-controlled program scan is resumed immediately after the interrupt has been triggered. The OB3 interrupt processing routine can be interrupted by an OB2 interrupt, but not by another OB3 interrupt or an OB13 call.
Page 347 S5-95F Interrupt Processing Ascertaining the Cause of an Interrupt Positive and/or negative signal edges trigger interrupts at one or more interrupt inputs. In this case, • OB3 is invoked, if programmed • The relevant bit in diagnostic byte IB 61 .. 63 is set to "1", even when OB3 has not been programmed.
Page 348: Programming Ob3
Interrupt Processing S5-95F 12.3.1 Programming OB3 In order to be able to respond quickly to an interrupt, OB3 should be kept as short as possible. Be sure to optimize the OB3 interrupt processing routine carefully. Note • In OB3, direct access is allowed to onboard I/Os only. •...
Page 349: Programming Interrupt Responses In Ob3
S5-95F Interrupt Processing 12.3.2 Programming Interrupt Responses in OB3 Interrupt-driven program scanning is possible only when the following prerequisites have been fulfilled: • Interrupt inputs have been enabled in DB1. • The programmable controller must be in the "POWER ON" state and set to "RUN". •...
Page 350: Interrupt Response Times For The S5-95F
Interrupt Processing S5-95F 12.4 Interrupt Response Times for the S5-95F The interrupt response time is the time between an edge change at the terminals of an interrupt input and the appropriate signal change at the terminals of an output on the basic unit. Any delays attributable to the cables, sensors or actuators are not part of the interrupt response time.
Page 351 S5-95F Interrupt Processing Minimum Signal Duration for OB2 Interrupts Note An OB2 interrupt is triggered by a negative edge at an OB2 interrupt input. The S5-95F can detect the edge under worst-case conditions only when signal levels "0" and "1" have a duration of at least 4 ms .
Page 352 Interrupt Processing S5-95F Response Time for OB3 Interrupts The response time for OB3 interrupts, T , depends on: OB3 response • the internal S5-95F delay for OB3 interrupts (max. 12 ms when no OB2 interrupts are used and max. 16 ms when both OB2 and OB3 interrupts are used) •...
Page 353 S5-95F on SINEC L1 13.1 Options for Connecting the S5-95F to the SINEC L1 LAN ..13- 1 13.2 Non-Failsafe Data Interchange over SINEC L1 ....13- 3 13.2.1 Initializing the S5-95F for Non-Failsafe Data Interchange .
Page 354 Figures 13-1 Subunit A on a Single SINEC L1 Channel ......13- 1 13-2 Subunit B on a Single SINEC L1 Channel .
Page 355: S5-95F On Sinec L1
0.14 mm . It is recommended that SIMATIC cable 6ES5 707-1AA00 be used. If you have any questions, please contact your local Siemens branch office. • If there are several nodes on the channel, connect the controllers using BT 777 bus terminals.
Page 356 S5-95F on SINEC L1 S5-95F Subunit B on a Single SINEC L1 Channel SINEC L1 master S5-95F Subunit B Subunit A Channel BT777 BT777 Figure 13-2. Subunit B on a Single SINEC L1 Channel Both Subunits on a Cable-Redundant, Double SINEC L1 Channel When a cable-redundant, double SINEC L1 channel is used, the configurations shown in Figures 13-3 and 13-4 can •...
Page 357: Non-Failsafe Data Interchange Over Sinec L1
S5-95F S5-95F on SINEC L1 Note Two CP 530s as SINEC L1 bus masters are required when using the double SINEC L1 bus. Availability can be increased by plugging the two CP 530s into two different central controllers. 13.2 Non-Failsafe Data Interchange over SINEC L1 Non-failsafe data interchange is possible with all SINEC L1 nodes, and is the same as the standard data interchange method used by all SIMATIC S5 U-range controllers.
Page 358: Initializing The S5-95F For Non-Failsafe Data Interchange
S5-95F on SINEC L1 S5-95F 13.2.1 Initializing the S5-95F for Non-Failsafe Data Interchange The S5-95F requires the following information in order to interchange data over the L1 channel: • The slave number of the S5-95F • The location of the Send data (data block or flag area) Designation: Send Mailbox, abbreviated SF •...
Page 359 S5-95F S5-95F on SINEC L1 Example: The S5-95F is to be a slave with the slave number 2 on the SINEC L1 bus. Subunit A is interfaced to the L1 bus: • The Send mailbox begins at data word 0 in DB2 •...
Page 360: Coordinating Non-Failsafe Data Interchange In The User Program
S5-95F on SINEC L1 S5-95F 13.2.2 Coordinating Non-Failsafe Data Interchange in the User Program After initializing the parameters, you have to write the user program for interchanging data. The user program is dependent on the coordination information which the operating system makes available in the coordination bytes (see Figure 13-5).
Page 361: Transmitting Non-Failsafe Data
S5-95F S5-95F on SINEC L1 13.2.3 Transmitting Non-Failsafe Data The prerequisites for transmitting data are as follows: • The location of the Send mailbox has been specified in DB1 (see section 13.2.1) • The data to be transmitted, additional information (such as the length of the Send data ("net data") and the destination slave number) have been forwarded to the Send mailbox.
Page 362: Receiving Non-Failsafe Data
S5-95F on SINEC L1 S5-95F The user program for transmitting data should be structured as follows: Check bit 7 in the KBS to see if data is currently being transferred (As long as the PLC is transferring data, bit 7 remains set in the KBS. During this phase, never attempt to change the contents of the Send Mailbox or start another data transfer).
Page 363 S5-95F S5-95F on SINEC L1 Structure of the Coordination Byte Receive (KBE) Figure 13-9 shows the structure of the Coordination Byte Receive (KBE). 0: No errors 1: Error during last data transfer 0: No slave failed 1: At least one slave failed 0: Bus at STOP 1: Bus at RUN 0: Program can access Receive...
Page 364: Failsafe Data Interchange Over Sinec L1
S5-95F on SINEC L1 S5-95F 13.3 Failsafe Data Interchange Over SINEC L1 Failsafe data interchange is possible with SINEC L1 S5-95F and S5-115F slave nodes. Failsafe data interchange is only possible when both sender and receiver are operating in the same message mode.
Page 365 S5-95F S5-95F on SINEC L1 Characteristics of Failsafe Data Interchange over SINEC L1 Table 13-4. Characteristics of Failsafe Data Interchange Characteristics of Failsafe Data Interchange Number of slaves to which the S5-95F can transmit: 2 (data paths 1 and 2) Number of slaves from which the S5-95F can receive: 2 (data paths 1 and 2) Permissible frame length (net data)
Page 366: Initializing The S5-95F For Failsafe Data Interchange
S5-95F on SINEC L1 S5-95F 13.3.1 Initializing the S5-95F for Failsafe Data Interchange The S5-95F must be supplied with the following information in DB1 in order to carry out failsafe data interchange over the L1 bus. • The slave number assigned to the S5-95F •...
Page 367 S5-95F S5-95F on SINEC L1 Example: The S5-95F is to be a slave station and have the slave number 2 on the SINEC L1 bus. Subunit A is interfaced to the L1 bus. The following conditions apply to data transfer: •...
Page 368 S5-95F on SINEC L1 S5-95F Table 13-5. Initializing the Interface for Failsafe Data Interchange (continued) Parameters in Description Value for Permissible Default DB Example Values Slave no. and slave type to which SNTS1 0 9 SNTS1 13 5 SNTS1 n t data is to be transmitted over n=1 to 31 data path 1;...
Page 369: Coordinating Failsafe Data Interchange In The User Program
S5-95F S5-95F on SINEC L1 13.3.2 Coordinating Failsafe Data Interchange in the User Program Once all parameters have been initialized, the user program for data interchange must be written. This program must access coordination info in the User Valid Byte (refer to Figure 13-10). Transmitter (source) Receiver (destination) Internal RAM memory...
Page 370 S5-95F on SINEC L1 S5-95F Coordinating Data Interchange via the User Valid Byte The User Valid Byte is used to coordinate data interchange (similar to the KBE and KBS for nonfailsafe data interchange). User Valid Byte Send mailbox coordination for data path 1 Receive mailbox coordination for data path 1 Send mailbox coordination for data path 2 Receive mailbox coordination for data path 2...
Page 371 S5-95F S5-95F on SINEC L1 Coordination of Frame Sequence (115F-14 and 115F-15 Modes) The S5-95F resets bit 0 or 2 of the UVB after sending the frame, even if the receiver's operating system has not accepted the data of the old frame. Safety Note When you use message modes 115F-14 and 115F-15, the S5-95F useful frame monitoring feature is deactivated.
Page 372: Sending Failsafe Data
S5-95F on SINEC L1 S5-95F 13.3.3 Sending Failsafe Data An S5-95F can send failsafe data to no more than two slaves (two "Send" paths). The destination slaves must be either S5-95Fs or S5-115Fs. You can transfer up to 60 bytes of net data per transmission.
Page 373 S5-95F S5-95F on SINEC L1 Contents of the "Send" Condition Code Byte (DR 32) "Send" Condition Code Byte 0: No errors 1: Frame could not be transmitted 0: No errors 1: Invalid transmission length (S5-95F responds with STOP) Send Coordination Via the User Valid Byte (as per the Parameter Values Initialized with COM 95F) User Valid Byte 0: Program can process Send Mailbox (data path 1) in...
Page 374: Receiving Failsafe Data
S5-95F on SINEC L1 S5-95F 13.3.4 Receiving Failsafe Data The S5-95F can receive failsafe data from up to two slaves (two "Receive" data paths). The source PLC must be either an S5-95F or an S5-115F. Up to 60 net data bytes may be transferred each time.
Page 375 S5-95F S5-95F on SINEC L1 Receive Coordination Via the User Valid Byte (as per the Parameter Values Initialized with COM 95F) You cannot process the Receive Mailbox until the operating system has completed the data transfer. To ascertain the status of the data transfer, you can evaluate the User Valid Byte. User Valid Byte 0: Program can process Receive Mailbox (data path 1) in DB 252.
Page 376 S5-95F on SINEC L1 S5-95F Contents of the Condition Code and Control Byte for Receive (DR 0 in 95F Message Mode) Condition Code Byte for Receive 0: Frame valid (operating system resets bit in the RESTART routine and following depassivation via FB255) 1: Frame invalid.
Page 377 S5-95F S5-95F on SINEC L1 Contents of the Condition Code and Control Byte for Receive (DR0 in 115F-14 Message Mode) Condition Code Byte for Receive 0: Frame valid (operating system resets bit in the RESTART routine and following depassivation via FB255) 1: Frame invalid.
Page 378 S5-95F on SINEC L1 S5-95F Contents of the Condition Code and Control Byte for Receive (DR0 in 115F-15 Message Mode) Condition Code Byte for Receive 0: Frame valid (operating system resets bit in the RESTART routine and following depassivation via FB255) 1: Frame invalid.
Page 379: Sinec L1 Safety Times
S5-95F S5-95F on SINEC L1 13.4 SINEC L1 Safety Times On a failsafe SINEC L1, the S5-95F differentiates between two types of safety time: The SINEC L1 safety time for Receive and the SINEC L1 safety time for Send. The safety times may be specified separately for each data path (i.e.
Page 380 S5-95F on SINEC L1 S5-95F Conditions for the SINEC L1 Safety Time for Receive 1st condition The first condition is based upon the principles of the transmitting and receiving system. Fulfillment of this condition is the basis of the SINEC L1 safety time for the receiving S5-95F: 2·(k+l)·SINEC L1 bus cycle time +200 ms SINEC L1 safety time for Receive...
Page 381 S5-95F S5-95F on SINEC L1 Error Response from Slave Node The following steps are carried out if a node does not receive a valid frame within the stipulated SINEC L1 safety time for Receive: • The operating system sets bit 0 in the "condition code and control byte Receive" and clears the Receive mailbox •...
Page 382: Sinec L1 Safety Time For Send
S5-95F on SINEC L1 S5-95F 13.4.2 SINEC L1 Safety Time for Send The S5-95F controls transmission of failsafe frames via an internal timer. The S5-95F always restarts the timer as soon as it expires. As long as the internal timer is running, the S5-95F transmits (during one timer cycle) the failsafe frames over data path 1 and data path 2;...
Page 383: Load Placed On The System By The Sinec L1 Channel
S5-95F S5-95F on SINEC L1 13.4.3 Load Placed on the System by the SINEC L1 Channel PLC Onload Due to Traffic on the SINEC L1 Channel Traffic on the SINEC L1 channel increases the load on the PLC cycle. The load caused by SINEC L1 traffic •...
Page 384: Response Time During Sinec L1 Traffic
S5-95F on SINEC L1 S5-95F 13.4.4 Response Time During SINEC L1 Traffic The response time during SINEC L1 traffic is the time from the input signal change in the transmitting system to the output signal change in the receiving system. The response time is a combination of three time periods: •...
Page 385: Transmission Of Error Messages To The Sinec L1 Master
S5-95F S5-95F on SINEC L1 13.4.5 Transmission of Error Messages to the SINEC L1 Master The S5-95F can automatically transmit system messages to the SINEC L1 master of channel B. This enables you to evaluate, display and print out all messages from a central point. If the appropriate parameters are entered in DB1 (see COM 95F manual), the S5-95F will send every message entered in the error stack of DB254 to the SINEC L1 master of channel B.
Page 386 S5-95F on SINEC L1 S5-95F Specifying the Polling List Master traffic must be guaranteed in each bus cycle. This results in the following sequence for the polling list in the SINEC L1 bus master: Polling list: 1-2-3-1-2-1-3 Calculating the SINEC L1 Bus Cycle Time The SINEC L1 bus cycle time is calculated as described in section 13.4.1: Quantity of data transmitted = 6 x 20 bytes+2 x (10+4) bytes+2 x (30+4) bytes+= 216 bytes...
Page 387 S5-95F S5-95F on SINEC L1 SINEC L1 Safety Time for Send for Slave 2 and Slave 3: The SINEC L1 safety time for Send must conform with the defined conditions (see section 13.4.2). 1st condition 2·(k+l)·SINEC L1 bus cycle time SINEC L1 safety time for Send where k = 1 data paths...
Page 388: Testing The User Program And Storing It On The Memory Submodule
Testing the User Program and Storing It on the Memory Submodule 14.1 Testing and Debugging the User Program ....14- 1 14.1.1 Program-Dependent Signal Status Display "STATUS" .
Page 389 Figures 14-1 "STATUS" Test Function ........14- 1 14-2 "STATUS VAR"...
Page 390: Testing The User Program And Storing It On The Memory Submodule
S5-95F Testing the User Program and Storing It on the Memory Submodule Testing the User Program and Storing It on the Memory Submodule This section provides: • A summary of the most important functions for debugging the user program • Information on how to transfer and save the debugged user program on the EPROM submodule 14.1 Testing and Debugging the User Program...
Page 391 Testing the User Program and Storing It on the Memory Submodule S5-95F Special Features of the STATUS Function The STATUS function increases the program scan time. The amount of the increase depends on the statements used. To prevent the program scan time from being exceeded because of STATUS, the specified scan monitoring time should be as long as the process response time allows.
Page 392: Direct Signal Status Display "Status Var"
S5-95F Testing the User Program and Storing It on the Memory Submodule 14.1.2 Direct Signal Status Display "STATUS VAR" This test function returns the status of an arbitrary operand (input, output, flag, data word, counter or timer) at the end of the program scan. Information about inputs and outputs can be obtained from the process input and process output images.
Page 393: Forcing Variables With "Force Var"
Testing the User Program and Storing It on the Memory Submodule S5-95F 14.1.3 Forcing Variables with "FORCE VAR" FORCE VAR allows you to modify the following variables when the programmable controller is either at STOP or RUN: I, Q, F, T, C and D. When the PLC is at RUN, the new process variables are used for the program scan.
Page 394: Interrupt Analysis With The Programmer
S5-95F Testing the User Program and Storing It on the Memory Submodule 14.2 Interrupt Analysis with the Programmer When malfunctions occur, the operating system sets various "analysis bits"; you can then scan these bits using the programmer's "ISTACK" function. 14.2.1 The "ISTACK" Analysis Function The interrupt stack is located in internal memory.
Page 395 Testing the User Program and Storing It on the Memory Submodule S5-95F ISTACK Output on the PG 710/730/750 and 770 Programmers Table 14-2 shows a programmer listing of ISTACK control bits. The control bits needed for fault analysis are emphasized in bold type. The righthand portion of the table shows the allocation of control bits to system data and absolute addresses in the PLCs.
Page 396 S5-95F Testing the User Program and Storing It on the Memory Submodule The ISTACK comprises system data words SD 203 to SD214. Table 14-4 shows which system data word contains which ISTACK entry. Table 14-4. ISTACK Entries in System Data Words 203 to 214 System Data Word ISTACK Entry Absolute Address...
Page 397 Testing the User Program and Storing It on the Memory Submodule S5-95F Table 14-5 provides a list of abbreviations used in the programmer's ISTACK listing. Table 14-5. Abbreviations for Control Bits and Causes of Faults Abbreviations for Relevant Abbreviations for Relevant Control Bits Causes of Faults BSTSCH Block Shift requested...
Page 398: Descriptions Of The Istack Flags
S5-95F Testing the User Program and Storing It on the Memory Submodule 14.2.2 Descriptions of the ISTACK Flags Table 14-6 shows the causes of error which can cause interruption of a program scan. The PLC goes to "STOP" in all cases. Table 14-6.
Page 399: Program Errors
Testing the User Program and Storing It on the Memory Submodule S5-95F Table 14-6. Interrupt Analysis (continued) ISTACK Cause of Error Corrective Measures Flags Substitution error: • Function block call with bad actual parameters Change actual parameters • Interrupt-driven and time-controlled scanning: Disable interrupts Integral FB call while other integral FB is being processed...
Page 400 S5-95F Testing the User Program and Storing It on the Memory Submodule Example: You have written a user program consisting of OB1, PB0 and PB7, but you programmed an illegal statement in PB7. 0000 0000 0000 000A 003F JU PB7 Illegal 000A JU PB0...
Page 401: Program Trace With The "Bstack" Function
Testing the User Program and Storing It on the Memory Submodule S5-95F 14.3.2 Program Trace with the "BSTACK" Function During program scanning, the following information is entered in the block stack (BSTACK) for each block called: • Block type and block number •...
Page 402: Programmer Control Functions
S5-95F Testing the User Program and Storing It on the Memory Submodule 14.4 Programmer Control Functions For safety reasons, the programmer control functions are restricted in failsafe systems. In such systems, only read-only programmer functions may be invoked. The only exception is the parameter control DB, which can be both read out and modified via the programmer in failsafe STOP mode.
Page 403 Testing the User Program and Storing It on the Memory Submodule S5-95F Operating the Programmer in Safety, Quasi-Safety and Test Mode Table 14-7. Operating the Programmer in Safety, Quasi-Safety and Test Mode Functions Invoked on Abbr. Test Quasi-/ the Programmer Mode Safety Mode STOP...
Page 404: Measures For Securing The User Program Against Errors
S5-95F Testing the User Program and Storing It on the Memory Submodule 14.5 Measures for Securing the User Program Against Errors Measures for Securing the User Program with the S5-95F Before storing the user program (including DB1) on EPROM, it must be run on the S5-95F at least once in Test mode .
Page 405 Testing the User Program and Storing It on the Memory Submodule S5-95F Which Blocks Need to be Stored on the EPROM? The following table shows which blocks you must store on the EPROM and which are optional. Table 14-9. Blocks Which Must be Stored on the EPROM Block ...
Page 406: Error Diagnosis And Elimination
Error Diagnosis and Elimination 15.1 S5-95F Responses to Errors ......15- 1 15.1.1 Hard STOP ........15- 1 15.1.2 Soft STOP .
Page 407 Figures 15-1 LEDs ..........15- 2 Tables 15-1 Structure of the System Event DB...
Page 408: Error Diagnosis And Elimination
S5-95F Error Diagnosis and Elimination Error Diagnosis and Elimination This section covers the following: • S5-95F responses to errors • Error indicator on the S5-95F basic unit • Structure of system event data block DB254 • Outputting error messages to printer via a CP 521 •...
Page 409: Error Indication
In Test mode until the PLC once again goes from STOP to RUN • In Safety and Quasi-Safety mode until the next STOP/POWER OFF/POWER ON/RUN sequence • Until it is reset in the user program via FB255 SIMATIC S5-95F STOP STOP COPY Figure 15-1. LEDs Evaluate the system event data block (DB254) when the yellow error LED flags an error.
Page 410: System Event Data Block Db254
S5-95F Error Diagnosis and Elimination 15.3 System Event Data Block DB254 The system event data block (DB254) is subdivided into several sections. These sections are shown in Table 15-1. Purpose, contents and characteristics of these sections are discussed in detail in the following sections.
Page 411: Standard Fb And Signature
Error Diagnosis and Elimination S5-95F 15.3.2 Standard FB and Signature You, as user, may never modify standard function blocks. In order to make sure that they remain unchanged, each standard FB has a signature. The S5-95F enters the signatures of the first 16 standard FBs loaded into data words DW 2 to DW 33 of DB 254.
Page 412: Image Of The Passivated Signal Groups
S5-95F Error Diagnosis and Elimination 15.3.4 Image of the Passivated Signal Groups Each signal group is assigned one bit. The operating system sets the bit for a signal group as soon as that group was passivated. Bit in 35.15 35.14 35.13 35.12 35.11 35.10 35.9 35.8 35.7 35.6...
Page 413: Static Image Of I/O Errors
Error Diagnosis and Elimination S5-95F 15.3.6 Static Image of I/O Errors Each failsafe input and output is assigned a bit in one of data words DW 38 to DW 55. The operating system sets a bit in one of these data words when the associated I/O bit indicates an error.
Page 414: Image Of Sinec L1 Errors
S5-95F Error Diagnosis and Elimination 15.3.7 Image of SINEC L1 Errors Each SINEC L1 error is assigned a bit in data word DW 56. Data word DW 56 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Data path 1, passivated Loss of useful data frame on data path 1 (95F mode only)
Page 415: Error Stack Entries
Error Diagnosis and Elimination S5-95F 15.3.8 Error Stack Entries All errors detected by the operating system during a cycle are flagged in the error stack. The error stack consists of: • An error block counter • A write pointer • 16 error blocks of 8 data words each Data Word Contents of the Data Words...
Page 416 S5-95F Error Diagnosis and Elimination Error Blocks Beginning in data word DW 64, a detailed report, including the cause of error, auxiliary information such as the I/O address or count, and the time stamp is entered for each error that occurs. Each such error report reserves 8 data words, and is sometimes referred to in the following as error block.
Page 417: Evaluating The Error Block
Error Diagnosis and Elimination S5-95F 15.3.9 Evaluating the Error Block You should evaluate the error block entry as soon as the yellow error LED on the base unit goes You can evaluate the error in one of two ways: • Direct reading out and interpreting of the system event DB •...
Page 418 S5-95F Error Diagnosis and Elimination Determine the cause of error. Ascertain the identifier for the main error report by viewing the contents of byte 1, and locate the associated plaintext message in the table below. If indicated in the table, also ascertain the auxiliary info by reading bytes 2 to 7. Ascertain the time at which the error occurred.
Page 419 Error Diagnosis and Elimination S5-95F Table 15-2. Evaluating System Events in DB254 (continued) Error No. Primary Auxiliary Corrective (Decimal) Information Information Measures Error in user program (error Byte 2: Evaluate ISTACK detected during program : Illegal operation in user Check program analysis) program : Timer or counter >...
Page 420 S5-95F Error Diagnosis and Elimination Table 15-2. Evaluating System Events in DB254 (continued) Error No. Primary Auxiliary Corrective (Decimal) Information Information Measures Error in user program (error Byte 2: Evaluate ISTACK detected during program scan) : Substitution error in FB Check program : Block nesting depth (Error response: Soft STOP)
Page 421 Error Diagnosis and Elimination S5-95F Table 15-2. Evaluating System Events in DB254 (continued) Error No. Primary Auxiliary Corrective (Decimal) Information Information Measures Error in user program Byte 2: Evaluate ISTACK (detected during program scan) : Illegal operation in user Check program program (Error response: Soft STOP) : Range violation in DO...
Page 422 S5-95F Error Diagnosis and Elimination Table 15-2. Evaluating System Events in DB254 (continued) Error No. Primary Auxiliary Corrective (Decimal) Information Information Measures Hardware fault in onboard DI Byte 2: Check load voltage (Error response specified in Byte no. Replace basic unit DB1: Soft STOP or reaction in Byte 3: user program)
Page 423 Error Diagnosis and Elimination S5-95F Table 15-2. Evaluating System Events in DB254 (continued) Error No. Primary Auxiliary Corrective (Decimal) Information Information Measures Module incorrectly configured in Byte 2: Check DB1 Byte no. Check hardware (Error response specified in Byte 3: DB1: Soft STOP or reaction in Bit no.
Page 424 S5-95F Error Diagnosis and Elimination Table 15-2. Evaluating System Events in DB254 (continued) Error No. Primary Auxiliary Corrective (Decimal) Information Information Measures Short circuit on sensor circuit Byte 2: Check wiring to external DI Byte no. Byte 3: (Error response specified in Bit no.
Page 425 Error Diagnosis and Elimination S5-95F Table 15-2. Evaluating System Events in DB254 (continued) Error No. Primary Auxiliary Corrective (Decimal) Information Information Measures Configuring error in DB1 Check configuring data in parameter block for short- circuit test - Combining of interrupt DI and non-interrupt DI (Response: Soft STOP) not allowed...
Page 426: Acknowledging Errors And Deleting Entries In The System Event Db
S5-95F Error Diagnosis and Elimination 15.4 Acknowledging Errors and Deleting Entries in the System Event DB Acknowledge an error only after • A failsafe response has been initiated • The reported error has been rectified. The S5-95F's response to an error or fault depends on its gravity. For this reason, there are several different ways to acknowledge an error, depending on •...
Page 427: Printer Output Of Error Messages Via A Cp 521
Error Diagnosis and Elimination S5-95F 15.5 Printer Output of Error Messages Via a CP 521 If you wish, you can output S5-95F error messages to printer. To do so, you need a CP 521 and two data blocks supplied with the COM 95F software. These blocks are on file CP521DST.S5D. Note that blocks DB1 and DB10 are for the CP 521, and may not be loaded into the S5-95F.
Page 428: Evaluating Cycle Time Statistics
S5-95F Error Diagnosis and Elimination 15.7 Evaluating Cycle Time Statistics The S5-95F collects statistical data on cycle times. This statistical data is located in internal RAM in the address space extending from 8004 to 80C3 . You can evaluate the cycle time statistic by invoking the programmer function OUTPUT ADDRESS.
Page 429: Diagnostic Byte For Battery And Load Voltage
Error Diagnosis and Elimination S5-95F Erasing Cycle Time Statistics Data Cycle time statistics data is erased • by an overall reset • by setting bit 6 in the control byte Starting the Recording of Cycle Time Statistics Data The recording of cycle time statistics data is started or resumed •...
Page 430: Differences Between The S5-95U And The S5-95F
Differences Between the S5-95U and the S5-95F 16.1 Differences in the I/Os ....... . 16- 1 16.1.1 Onboard I/Os .
Page 431: Differences Between The S5-95U And The S5-95F
S5-95F Differences Between the S5-95U and the S5-95F Differences Between the S5-95U and the S5-95F The S5-95F's special failsafe method of operation makes a number of differences between it and the S5-95U inevitable. These differences are discussed in detail below. 16.1 Differences in the I/Os Both the S5-95F's onboard and external I/Os differ from those of the S5-95U.
Page 432: Parameter Initialization And Programming
Differences Between the S5-95U and the S5-95F S5-95F 16.2 Parameter Initialization and Programming 16.2.1 Parameter Initialization in DB1 • DB1 in the S5-95F is more comprehensive than for the S5-95U because more information is needed for the operating system (such as, for instance, information required for maintaining redundancy) •...
Page 433: Cyclic Program Scanning
S5-95F Differences Between the S5-95U and the S5-95F 16.3 Program Scanning 16.3.1 Cyclic Program Scanning • Due to additional failsafe functions, the S5-95F operating system's runtime is greater than that of the S5-95U's operating system, and is typically 50 ms. •...
Page 434: Programmer Functions And Error Diagnostics
Differences Between the S5-95U and the S5-95F S5-95F 16.5 Programmer Functions and Error Diagnostics 16.5.1 Programmer Functions On the S5-95F, the programmer functions are restricted in failsafe mode. An overview of permissible programmer functions can be found in Table 14-7. 16.5.2 Error Diagnostics •...
Page 435: Application
Application 17.1 Hardware Prerequisites ....... 17- 1 17.2 Process Description ........17- 2 17.3 Installation and Wiring...
Page 436 Figures 17-1 Process Mimic of a Hydraulic Lifting Device ..... . . 17- 2 17-2 Setting the Device ID ........17- 3 17-3 Circuit Diagram for Simplified Model (with no consideration given to sensor/actuator redundancy)
Page 437: Application
S5-95F Application Application The following example is that of a model hydraulic lifting device. The purpose of this example is to give you an insight into how the S5-95F works. In order to keep the example simple and easy to understand, we have omitted the many special regulations which would have to be considered when dealing with a real application.
Page 438: Process Description
Application S5-95F 17.2 Process Description Figure 17-1 shows the process mimic of a simplified hydraulic lifting device. The description of the hydraulic lifting device follows below: The hydraulic stamp starts to move • When the stamp is at top dead center •...
Page 439: Installation And Wiring
S5-95F Application 17.3 Installation and Wiring The main prerequisite for error-free S5-95F start-up is proper wiring. To install and wire, proceed as follows: Affix the two basic units to the standard mounting rail Insert the 40-pin onboard connectors into the basic units Remove the protective coverings from the fiber-optics sockets Connect the two basic units to the fiber-optics cable Connect basic unit terminals L + and M with +24 V and M...
Page 440 Application S5-95F Connect the sensors as per the circuit diagram. Care must be taken that the inputs are connected in parallel. Connect the actuators as per the circuit diagram. Care must be taken that the output bits on subunits A and B are allocated to different terminals (see section 4.5).
Page 441: Entering The User Program
S5-95F Application 17.4 Entering the User Program Before putting the user program onto floppy disk, you must copy the block headers of the integral function blocks to the specified program file. Switch on both subunits (on/off switch to "l" position). Result: The subunits are synchronized.
Page 442 Application S5-95F PB2 FUP Description SEGMENT 1 Timer T1 for two-handed contemporaneity +-----+ on momentary-contact start switch S2 I 32.0 --!1_-_ ! KT 050.0 --!TW DU!- DI!- --!R +-----+ SEGMENT 2 Timer T2 for two-handed contemporaneity +-----+ on momentary-contact start switch S2 I 32.1 --!1_-_ ! KT 050.0 --!TW DU!-...
Page 443 S5-95F Application PB1 STL Description Preset values for flags used in FB255 0000 KF +15 Job no. 15: Short-circuit test 0002 FY 110 0003 KF +0 Relevant for job no. 2 only 0005 FW 112 0006 KM 00000000 00000011 Test outputs Q33.0 and Q 33.1 0008 FY 115 0009...
Page 444: Entering Configuring Data With Com 95F
Application S5-95F 17.5 Entering Configuring Data with COM 95F Once the blocks have been entered, you must generate data block DB1 with COM 95F. DB1 contains the configuring data for the S5-95F. To generate this block, proceed as follows: Call COM 95F on the programmer In the DEFAULTS form, enter the name of the program file containing the user program for the S5-95F Confirm with <F6>...
Page 445 S5-95F Application Configuring Inputs I32.0 and I32.1 In the case of a discrepancy on one of the redundant inputs I32.0/I32.1, the S5-95F is to passivate all outputs allocated to signal group 5. In addition, the S5-95F is to monitor inputs 32.0 and 32.1 for short circuits. Set the cursor to the field for DI byte 32/column 0 (for bit 0).
Page 446 Application S5-95F Configuring Data for the S5-95F as Generated by COM 95F DB1 STL Description KS ='DB1 SDP: SYID 0 DBCON 2 '; KS ='251 CYST N AGCYC 25 DBPA'; KS ='R N ERSI N ERCP N ; TFB:'; KS =' OB13 0 ; CLP: STW N CLK'; KS =' N SET N OHS N OHE N TIS';...
Page 447: Testing And Error Simulation
S5-95F Application 17.6 Testing and Error Simulation Prerequisites for the following: • Both subunits must be switched on and an overall reset executed on each • The system must be at STOP Transferring the User Program to the S5-95F Transfer the user program, including DB1, to subunit A. The S5-95F's operating system then automatically forwards it to the other subunit over the fiber- optics cable.
Page 448 Application S5-95F Note The Reset button starts FB255, initiating depassivation. Depassivation takes about 30 seconds, after which the S5-95F is fully functional. Before the S5-95F once again includes the defective component in the cycle, it is tested. This test is particularly apparent when digital outputs are involved, as the LEDs on the digital output modules light up briefly.
Page 449: Rules For Failsafe Operation Of An S5-95F
Rules for Failsafe Operation of an S5-95F 18.1 Acceptance Test for a System Containing an S5-95F ..18- 1 18.1.1 Planning Phase ........18- 2 18.1.2 Pre-Acceptance Inspection .
Page 450 Rules for Failsafe Operation of an S5-95F 18.14 Addressing and Address Assignments ....18- 29 18.14.1 Address Assignments for Onboard I/Os .
Page 451 Figures 18-1 Subdivision of the I/Os into Signal Groups ......18- 18 18-2 Schematic of a Structured Program Sequence .
Page 452: Rules For Failsafe Operation Of An S5-95F
S5-95F Rules for Failsafe Operation of an S5-95F Rules for Failsafe Operation of an S5-95F Safety-related systems are divided into • Systems requiring no acceptance test • Systems requiring an acceptance test The operator is himself responsible for systems not requiring an acceptance test, whereas those requiring an acceptance test are examined by independent experts.
Page 453: Planning Phase
Rules for Failsafe Operation of an S5-95F S5-95F The COM 95F Software Package Supports the Acceptance and Approval Procedure The COM 95F software package helps you initialize the system parameters (DB1), and also provides a print function for hardcopy documentation. For more detailed information on the COM 95F software, please see the COM 95F Manual.
Page 454 S5-95F Rules for Failsafe Operation of an S5-95F Decide on Which Timers and Counters are Relevant to Failsafety The inspector decides which timers and counters are relevant to failsafety. This decision includes values for system parameters which must be initialized with COM 95F, such as •...
Page 455: Pre-Acceptance Inspection
Rules for Failsafe Operation of an S5-95F S5-95F 18.1.2 Pre-Acceptance Inspection Normally, the documents listed below must be handed over at a pre-acceptance test. The documents must be released by the operator/installation engineer and must include the system, version and date. •...
Page 456: Acceptance Test
S5-95F Rules for Failsafe Operation of an S5-95F 18.1.3 Acceptance Test Before the inspector carries out the acceptance test, you should have tested your failsafe system at least once in failsafe mode with an EPROM submodule. The following must be made available to the inspector: •...
Page 457 Rules for Failsafe Operation of an S5-95F S5-95F Checking Observance of the Conditions of the Prototype Test This step is intended to make sure that all conditions of the prototype test and all rules for failsafe operation detailed in the Product Manual have been observed. This includes, for instance, checking to make sure that the quiescent current principle has been observed for all external safety circuits connected to the system.
Page 458: I/Os
S5-95F Rules for Failsafe Operation of an S5-95F 18.2 I/Os When connecting I/Os, please observe the rules for I/O addressing discussed in Chapter 6. Special features regarding the use of I/Os are summarized in the following section. 18.2.1 Circuit Diagram for I/Os Table 18-1.
Page 459 Rules for Failsafe Operation of an S5-95F S5-95F Table 18-1. Circuit Diagram for I/Os (continued) Circuit Diagram Comments Modules Failsafe binary input module 1×DQ Onboard I/O I/O type E with two-channel sensor and 2×F DIs 6ES5 431-8FA11 high-quality line monitoring 1×DQ Onboard I/O 2×F DIs...
Page 460 S5-95F Rules for Failsafe Operation of an S5-95F Table 18-1. Circuit Diagram for I/Os (continued) Circuit Diagram Comments Modules Failsafe binary output module 2×F DQs 6ES5 450-8FA11 I/O type M with indirect driving of a Coupling relay failsafe actuator via contactor-relay contacts (both modules with source Subunit A...
Page 461: Discrepancy Times
Rules for Failsafe Operation of an S5-95F S5-95F 18.2.2 Discrepancy Times As a rule, the Read result for an input signal is identical in both subunits. However, in certain situations there can sometimes be a discrepancy. Reasons for this may be •...
Page 462 S5-95F Rules for Failsafe Operation of an S5-95F Note • The average discrepancy time (approx. 5 ms) fluctuates with the synchronization interval. In off-loaded systems, the average discrepancy time is 5 ms, in systems on-loaded to the maximum with interrupts more than 10 ms. •...
Page 463: Operating Modes
Rules for Failsafe Operation of an S5-95F S5-95F 18.3 Operating Modes The S5-95F differentiates between three different operating modes: • Safety mode • Test mode • Quasi-safety mode Safety Note Whenever the process controller carries out safety functions, the S5-95F must operate in safety mode".
Page 464: Memory Submodules For Safety Mode
S5-95F Rules for Failsafe Operation of an S5-95F 18.5 Memory Submodules for Safety Mode The S5-95F operates in safety mode only when the user program is stored on an EPROM submodule. The table below lists the permissible memory submodules. Table 18-3. Overview of EPROM Submodules Submodule Type Submodule Order No.
Page 465: Retentivity Of Timers, Counters And Flags
Rules for Failsafe Operation of an S5-95F S5-95F 18.7 Retentivity of Timers, Counters and Flags The table below provides information on the number and retentivity (a timer, counter or flag which is retentive retains its contents, one which is not does not) of timers, counters and flags, data blocks and system data bytes.
Page 466 Table 18-6. Permissible Actuators for the S5-95F Manufacturer Type Rated Power of Rated Operational Solenoids Current SIEMENS 3TF2010-0BB4 3 W at 24 V DC 3×9 A at 400 V AC SIEMENS 3TH8031-0B 6.2 W at 24 V DC 4×10 A at 230 V AC...
Page 467: Response To I/O Errors
By connecting them to diodes or RC networks, you can delay actuator drop-out. The dimensioning of the required components is dependent on the actuator used. If you have any special questions, your contact at the Siemens branch office nearest you would be glad to help. 18.10 Response to I/O Errors In order to increase its availability, the S5-95F does not always respond to I/O errors by going to STOP.
Page 468 S5-95F Rules for Failsafe Operation of an S5-95F Special Features of Standard Value Formation for Onboard Counters Safety Note In the case of discrepancies in onboard counters, the system operates in part with counter values ascertained over a single channel. If you choose formation of a standard value with AND, OR or OLD VALUE as system response to onboard counter discrepancies, you may not use the counter values for failsafe functions following a counting error.
Page 469: Depassivating I/Os
Rules for Failsafe Operation of an S5-95F S5-95F 18.10.2 Depassivating I/Os Faulty sensors and actuators are frequently the cause of I/O passivation. If the problem with sensors and/or actuators can be eliminated while the PLC is at RUN, you can depassivate the I/Os with FB255.
Page 470 S5-95F Rules for Failsafe Operation of an S5-95F Diagram for the example The user program is structured in such a way that when a signal group is passivated, the associated program section will no longer be scanned (see Figure 18-1). Note that the I/Os in a signal group may not be depassivated until this has been shown to be safe in a check routine at the user level.
Page 471 Rules for Failsafe Operation of an S5-95F S5-95F 18.10.3 Standard Value Formation and Reaction at the User Level When processes execute whose immediate shutdown at the first occurrence of an I/O error must be avoided, choose the formation of a standard value as reaction to discrepancies in input signals and initiate that reaction yourself at the user level.
Page 472: Repairs
S5-95F Rules for Failsafe Operation of an S5-95F 18.11 Repairs When installing, disassembling or modifying your system, you must proceed as follows: Table 18-8. Hardware Installation, Removal and Replacement Installation, Removal and POWER Mode Load Voltage Replacement of: Basic unit Supply voltage Irrelevant Irrelevant...
Page 473: S5-95F Response Times
Rules for Failsafe Operation of an S5-95F S5-95F 18.12 S5-95F Response Times The maximum response times must always be computed for systems and processes which require approval. The maximum response times must be less than the maximum values stipulated by the rules and conventions and by the qualified experts.
Page 474: Response Time And Minimum Signal Duration For Time-Controlled Program Processing
S5-95F Rules for Failsafe Operation of an S5-95F 18.12.2 Response Time and Minimum Signal Duration for Time-Controlled Program Processing If a change in an input signal results in a change in an output signal, the S5-95F's response time is defined as the instant at which the signal changes at the S5-95F's input terminals until the instant at which the signal changes at the S5-95F's output terminals.
Page 475: Response Times And Minimum Signal Duration For Ob2 Interrupts
Rules for Failsafe Operation of an S5-95F S5-95F 18.12.3 Response Times and Minimum Signal Duration for OB2 Interrupts The interrupt response time is the time between an edge change at the terminals of an interrupt input and the signal change at the terminals of an output on the base unit. Not included in the interrupt response time are the delays caused by circuits, sensors and actuators.
Page 476: Response Times And Minimum Signal Duration For Ob3 Interrupts
S5-95F Rules for Failsafe Operation of an S5-95F 18.12.4 Response Times and Minimum Signal Duration for OB3 Interrupts The interrupt response time is the time between an edge change at the terminals of an interrupt input and the signal change at the terminals of an output on the basic unit. Not included in the interrupt response time are the delays caused by circuits, sensors and actuators.
Page 477: Special Programming Features
Rules for Failsafe Operation of an S5-95F S5-95F 18.13 Special Programming Features To ensure the failsafety of systems which require approval, a number of STEP 5 operations have been restricted or may not be used at all. 18.13.1 Disabling/Enabling Interrupts Note that the STATUS function cannot be used on blocks which are invoked between an IA and an RA operation in the quasi-safety mode.
Page 478: Stop Operation In The User Program
S5-95F Rules for Failsafe Operation of an S5-95F Warning Note that you may only use the system data bytes listed in Table 6.6. Improper use of system data may result in malfunctioning of the S5-95F, and can thus impair the system's failsafety.
Page 479: Measures For Securing The User Program Against Errors
Rules for Failsafe Operation of an S5-95F S5-95F 18.13.7 Triggering Edge for OB3 Interrupts Safety Note Execution of the interrupt service routine in OB3 can be initiated by a) a falling edge, b) a rising edge or c) a falling or rising edge at a software interrupt input. The edge(s) to trigger execution of OB3 must be specified with COM 95F.
Page 480: Addressing And Address Assignments
S5-95F Rules for Failsafe Operation of an S5-95F 18.14 Addressing and Address Assignments The S5-95F's I/Os are subdivided into onboard I/Os and external I/Os. In order that it be possible to address specific inputs and outputs, the I/Os must be assigned addresses.
Page 481: Address Assignments For Onboard I/Os
Rules for Failsafe Operation of an S5-95F S5-95F 18.14.1 Address Assignments for Onboard I/Os The addresses of the onboard I/Os are permanently assigned and cannot be changed by you. The assignment is shown in the following table: Byte/Word Onboard I/Os Bit Address Address Digital inputs, failsafe...
Page 482 S5-95F Rules for Failsafe Operation of an S5-95F If the S5-95F consists of several tiers, numbering of the expansion tiers is continued with the slot on the extreme left. Slot number in subunit A Slot number in subunit B 24 26 25 27 S5-95F S5-95F...
Page 483: Loadable Function Blocks
Rules for Failsafe Operation of an S5-95F S5-95F 18.15 Loadable Function Blocks Frequently repeated or particularly complex program sections (such as event signalling functions and compute functions) are programmed in function blocks. These blocks have specifiable parameters and an extended operation set (e.g. Jump operations within a block). The loadable function blocks are subdivided into •...
Page 484: Programmer-Based Operator Input Functions
S5-95F Rules for Failsafe Operation of an S5-95F 18.16 Programmer-Based Operator Input Functions For reasons of safety, the programmer-based operator input functions are restricted in safety mode. In this mode, only Read functions may be invoked on the programmer. Only the parameter control DB can be both read out and modified via the programmer in safety mode when the PLCs are at STOP.
Page 485 Rules for Failsafe Operation of an S5-95F S5-95F Programmer Input in Safety, Quasi-Safety and Test Mode Table 18.10 Programmer Input in Safety, Quasi-Safety and Test Mode Programmer-Based Functions Abbr. Test Mode Quasi-Safety/ Safety Mode STOP STOP Inputting/outputting blocks Input block INPUT DB, FB, OB, PB, SB Parameter control DB...
Page 486: Connecting Text Displays Via The Serial Interface
S5-95F via the latter's serial interface. If you have any questions about text displays, please consult your Siemens contact, who will be glad to tell you which text displays can be connected to the S5-95F.
Page 487: Sinec L1 Lan
Rules for Failsafe Operation of an S5-95F S5-95F 18.18 SINEC L1 LAN Note the following when operating a SINEC L1 LAN: • The SINEC L1 master may be any SIMATIC U-range programmable controller, a PC with master capability, or another device with that capability. •...
Page 488 S5-95F Rules for Failsafe Operation of an S5-95F Coordinating Frame Sequences (95F Mode) The S5-95F does not send a "new" useful message frame until the receiver's operating system has retrieved the data in the "old" useful message frame. The transmitter, however, does not receive an acknowledgement which tells it whether the receiver's user program has actually evaluated the useful message frame.
Page 489: Sinec L1 Safety Times
Rules for Failsafe Operation of an S5-95F S5-95F 18.19 SINEC L1 Safety Times In a failsafe SINEC L1 system, the S5-95F differentiates between two types of safety times, i.e. the SINEC L1 safety time for Receive and the SINEC L1 safety time for Send. The safety times may be set separately for each data path (max.
Page 490 S5-95F Rules for Failsafe Operation of an S5-95F Conditions for the SINEC L1 Safety Time for Receive 1st condition The following condition requires consideration of the transmitting and the receiving system. The receiving S5-95F must fulfill the following as regards the SINEC L1 safety time: 2·(k+l)·SINEC L1 bus cycle time +200 ms SINEC L1 safety time for Receive...
Page 491 Rules for Failsafe Operation of an S5-95F S5-95F Error Response from Slave Node If a node fails to receive a valid frame within the stipulated SINEC L1 safety time for Receive, • The operating system sets bit 0 in the "Condition code and control byte for Receive" and clears the Receive mailbox •...
Page 492: Sinec L1 Safety Time For Send
S5-95F Rules for Failsafe Operation of an S5-95F 18.19.2 SINEC L1 Safety Time for Send The S5-95F controls transmission of failsafe frames via an internal timer. The S5-95F restarts the timer as soon as it expires. As long as the internal timer is running, the S5-95F transmits (during one timer cycle) the failsafe frames over data paths 1 and 2;...
Page 493: Response Time During Sinec L1 Traffic
Rules for Failsafe Operation of an S5-95F S5-95F 18.19.3 Response Time During SINEC L1 Traffic The response time during SINEC L1 traffic is the time between the change in the input signal in the transmitting system and the change in the output signal in the receiving system. The response time is computed from three different times: •...
Page 494: D Guidelines For Handling Electrostatic Sensitive Devices (Esd)
Appendices Appendix A Module Spectrum Appendix B Dimension Drawings Appendix C Operations List Appendix D Guidelines for Handling Electrostatic Sensitive Devices (ESD) Appendix E Prototype Test Certification EWA 4NEB 812 6210-02...
Page 495 Module Spectrum General Technical Specifications for Failsafe Modules ........A - 1 Programmable Controllers .
Page 496: A Module Spectrum
S5-95F Module Spectrum Module Spectrum General Technical Specifications for Failsafe Modules Electromagnetic Compatibility (EMC) Climatic Environmental Conditions Noise Immunity Temperature Rated electromagnetic to IEC 801-3, Operating field test severity rating 3 - horizontal design 0 to+60 °C (32 to 104 °F) field strength 10 V/m - vertical design 0 to+40 °C (32 to 104 °F)
Page 497: A.2 Programmable Controllers
Module Spectrum S5-95F Programmable Controller Technical Specifications S5-95F (6ES5 095-8FA02) Output current Dimensions and Weight - from V 1 Dimensions WxHxD (in mm) 145×135×146 - from V 1 0.65 A (in in.) 5.7 × 5.3 × 5.7 Short-circuit protection electronic Weight - S5-95F approx.
Page 498 S5-95F Module Spectrum For digital outputs (continued): for interrupt inputs Total current Floating - for failsafe outputs Input voltages and currents - for single-channel outputs as for digital inputs Driving of digital input possible (see Specific Onboard I/O Specifications) Parallel switching of outputs Delay time - for failsafe outputs possible, if outputs...
Page 499: A.3 Digital Modules
Module Spectrum S5-95F Digital Modules Digital Input Module 8×DC 24 V (6ES5 431-8FA11) - Safety-Related - Technical Specifications Address designation (for ET 100U only) 8 DI Number of inputs Galvanic isolation yes (optocoupler) - in groups of Input voltage L+ - rated value +24 V DC - "0"...
Page 500 S5-95F Module Spectrum Digital Output Module 4×DC 24/2 A (6ES5 450-8FA11) Source or Sink Output - Safety-Related - Technical Specifications Number of outputs Galvanic isolation yes (transformer) - in groups of Load voltage L+ - rated value 24 V DC - permissible range 20 to 30 V L+ M...
Page 501: A.4 Bus Units
Bus Units Bus Unit (SIGUT Screw-Type Terminals) (6ES5 700-8FA11) Technical Specifications Type of connection SIGUT screw-type terminals Number of plug-in modules SIEMENS Number of bus units per programmable controller max. Connection between two bus units flat ribbon Number of terminals...
Page 502 Module Spectrum Bus Unit (Crimp Snap-In Connections) (6ES5 700-8MA22) Technical Specifications Type of connection Crimp snap-in Number of plug-in modules Number of bus units SIEMENS per programmable controller max. 16 Connection between two bus units flat ribbon Number of terminals...
Page 503: A.5 Interface Modules
Cable connectors for the IM 316 - Cable connector (0.5 m/1.6 ft.) 6ES5 712-8AF00 - Cable connector (2.5 m/8.2 ft.) 6ES5 712-8BC50 SIEMENS - Cable connector SIMATIC S5 (5.0 m/16.5 ft.) 6ES5 712-8BF00 INTERFACE MODULE 6ES5 316-8FA12 - Cable connector (10 m/33 ft.)
Page 504: A.6 Standard Modules From The S5-100U Range
S5-95F Module Spectrum Standard Modules from the S5-100U Range The following overview shows you the standard modules from the S5-100U system family which you can currently use in your S5-95F. Module/Component Order No. Digital input module 8 x 24 V DC 6ES5 431-8MA11 Digital input module 8 x 230 V AC 6ES5 431-8MD11...
Page 505 Module Spectrum S5-95F Digital Input Module 8 x 24 V DC (6ES5 431-8MA11) Technical Specifications Number of inputs Galvanic isolation yes (optocoupler) - in groups of Input voltage L+ - rated value 24 V DC - "0" signal 0 to 5 V - "1"...
Page 506 S5-95F Module Spectrum Digital Input Module 8 x 230 V AC (6ES5 431-8MD11) Technical Specifications Number of inputs Galvanic isolation yes (optocoupler) - in groups of Input voltage L1 - rated value 230 V AC/DC - ”0” signal 0 to 95 V - ”1”...
Page 507 Module Spectrum S5-95F Digital Input Module 8 x 5 to 24 V DC (6ES5 433-8MA11) Technical Specifications Number of inputs Galvanic isolation yes (optocoupler) - in groups of Input voltage L+ - rated value 5 to 24 V DC - "0" signal V in approx.
Page 508 S5-95F Module Spectrum Digital Output Module 8 x 24 V DC/1 A (6ES5 451-8MA11) Technical Specifications Number of outputs Galvanic isolation yes (optocoupler) - in groups of Load voltage L+ - rated value 24 V DC - permissible range 20 to 30 V (including ripple) - value at t<0.5 s 35 V...
Page 509 Module Spectrum S5-95F Digital Output Module 8×115 to 230 V AC/0.5 A (6ES5 451-8MD11) Technical Specifications Number of outputs Galvanic isolation yes (optocoupler) - in groups of Load voltage L1 - rated value 115 to 230 V AC - frequency max.
Page 510 S5-95F Module Spectrum Relay Output Module 4 x 30 V DC/ 230 V AC (6ES5 452-8MR11) Technical Specifications Outputs 4 relay outputs, contact switching varistor Galvanic isolation yes (optocoupler) - in groups of Continuous current I Length of cable - unshielded max.
Page 511 Module Spectrum S5-95F Digital Output Module 8×5 to 24 V DC/0.1 A (6ES5 453-8MA11) Technical Specifications Number of outputs Galvanic isolation - in groups of Load voltage L+ - rated value 5 to 24 V DC - permissible range 4.75 to 30 V (including ripple) - value at t<0.5 s 35 V...
Page 512 S5-95F Module Spectrum Digital Input/Output Module with LED Display (6ES5 482-8MA13) Crimp Snap-in Connector, 40-pin (6ES5 490-8MA13/8MA03) Screw Plug Connector, 40-pin (6ES5 490-8FB11) DIGITAL 32x24V DC n + 1 0.5 A 0.5A 1 2 3 +9 V Data M L + 180 K M L + A-17...
Page 513 Module Spectrum S5-95F Digital Input/Output Module with LED Display (continued) (6ES5 482-8MA13) Technical Specifications Output side Cable length Number of outputs - unshielded 100 m (330 ft.) Galvanic isolation - in groups of Rated insulation voltage (+9 V to 12 V AC Load voltage L+ - insulation group 1 ×...
Page 514 S5-95F Module Spectrum Analog Input Module 4 x±10 V (6ES5 464-8MC11) operating mode Ch.0 Ch.1 Ch.2 Ch.3 10 - ANALOG INPUT 4 x ± 10 V 6ES5 464-8MC11 +9 V Data 2,5 k 47 k Ch.0 Ch.1 Ch.2 Ch.3 A-19 EWA 4NEB 812 6210-02...
Page 515 Module Spectrum S5-95F Analog Input Module 4 x±10 V (continued) (6ES5 464-8MC11) Technical Specifications Input ranges Noise suppression (rated values) ±10 V for f=nx (50/60 Hz±1%); Number of inputs 1, 2 or 4 n=1,2, ... (selectable) - common-mode min. 86 dB rejection (V =1 V) Galvanic isolation...
Page 516 S5-95F Module Spectrum Analog Input Module 4 x±20 mA (6ES5 464-8MD11) operating mode Ch.0 Ch.1 Ch.2 Ch.3 10 - ANALOG INPUT 4 x ± 20 mA 6ES5 464-8MD11 +9 V +9 V Data Data Four-wire transducer Two-wire transducer Ch.0 Ch.1 Ch.2 Ch.3 A-21...
Page 517 Module Spectrum S5-95F Analog Input Module 4 x ± 20 mA (continued) (6ES5 464-8MD11) Technical Specifications Input ranges Noise suppression (rated values) ±20 V for f=nx (50/60 Hz±1%); Number of inputs 1, 2 or 4 n=1,2, ... (selectable) - common-mode min.
Page 518 S5-95F Module Spectrum Analog Input Module 4 x ± 4 to 20 mA (6ES5 464-8ME11) operating mode Ch.0 Ch.1 Ch.2 Ch.3 10 - ANALOG INPUT 4 x 4 ... 20 mA 6ES5 464-8ME11 +9 V +9 V Data Data 31,2 31,2 Four-wire transducer Ch.0...
Page 519 Module Spectrum S5-95F Analog Input Module 4 x ± 4 to 20 mA (continued) (6ES5 464-8ME11) Technical Specifications Input ranges Noise suppression (rated values) 4 to 20 mA for f=nx (50/60 Hz±1%); Number of inputs 1, 2 or 4 n=1, 2, ... (selectable) - common-mode min.
Page 520 S5-95F Module Spectrum Analog Output Module 2 x±10 V (6ES5 470-8MA12) 24 V Ch.0 M ANA Ch.1 M ANA R 3k ANALOG OUTPUT 2 x± 10 V 6ES5 470-8MA12 +9 V Data - 15 V +15 V S+ QV S- M A S+ QV S- M A Legend: QV: Analog output ”voltage”...
Page 521 Module Spectrum S5-95F Analog Output Module 2 x±10 V (continued) (6ES5 470-8MA12) Technical Specifications EMC Characteristics for Use in S5-95F Electrostatic discharge Output range to IEC 801-2 Severity rating 2 (rated values) ±10 V tested with 8 kV air discharge 4 kV contact discharge Number of outputs Electromagnetic fields...
Page 522 S5-95F Module Spectrum Analog Output Module 2 x±20 mA (6ES5 470-8MB12) 24 V Ch.0 M ANA Ch.1 M ANA R 300 ANALOG OUTPUT 2 x± 20 mA 6ES5 470-8MB12 +9 V Data - 15 V +15 V M ANA M ANA Ch.0 Ch.1 Legend:...
Page 523 Module Spectrum S5-95F Analog Output Module 2 x±20 mA (continued) (6ES5 470-8MB12) Technical Specifications Output range EMC Characteristics for Use in S5-95F (rated values) ±20 mA Electrostatic discharge to IEC 801-2 Severity rating 2 Number of outputs tested with 8 kV air discharge Galvanic isolation yes (outputs to 4 kV contact...
Page 524 S5-95F Module Spectrum Analog Output Module 2 x 4 to 20 mA (6ES5 470-8MC12) 24 V Ch.0 M ANA Ch.1 M ANA R 300 ANALOG OUTPUT 2 x 4 ... 20 mA 6ES5 470-8MC12 +9 V Data - 15 V +15 V M ANA M ANA...
Page 525 Module Spectrum S5-95F Analog Output Module 2 x 4 ... 20 mA (continued) (6ES5 470-8MC12) Technical Specifications EMC Characteristics for Use in S5-95F Output range (rated value) 4 to 20 mA Electrostatic discharge to IEC 801-2 Severity rating 2 Number of outputs tested with 8 kV air discharge Galvanic isolation...
Page 526 S5-95F Module Spectrum CP 521 SI Communications Processor (6ES5 521-8MA21) Technical Specifications Galvanic isolation TTY signals are isolated Memory submodule EPROM/EEPROM Serial interface V.24/TTY passive (active) Transmission Asynchronous 10-bit character frame/ 11-bit character frame Transmission rate 110 to 9600 baud Permissible cable length Battery - V.24...
Page 527 Module Spectrum S5-95F Counter Module 25/500 kHz (6ES5 385-8MB11) 2× 4× 24 V HIGH SPEED COUNTER 25/500 kHz 6ES5 385-8MB11 +9 V Data +5 V 24 V A-32 EWA 4NEB 812 6210-02...
Page 528 S5-95F Module Spectrum Counter Module 25/500 kHz (continued) (6ES5 385-8MB11) Technical Specifications Operating mode Input frequency max. 100 Hz (switch-selectable) Inherent delay typ. 3 ms (1.4 to 5 ms) - position decoder PD (Position Decoder) - counter C (Counter) Cable length (unshielded) max. 100 m (330 ft.) Sensor inputs 1 sensor 5 V...
Page 529 Module Spectrum S5-95F IP 262 Closed-Loop Control Module (6ES5 262-8MA12) (6ES5 262-8MB12) STATUS CLOSED LOOP CONTROLLER 6ES5 262-8MA12 A-34 EWA 4NEB 812 6210-02...
Page 530 S5-95F Module Spectrum IP 262 Closed-Loop Control Module (continued) (6ES5 262-8MA12) (6ES5 262-8MB12) Technical Specifications Controller Binary Outputs of the Open-Loop Controller (6ES5 262-8MB12) Total cycle time (equals scan time) 100 to 200 ms Number of outputs Resolution of the Galvanic isolation open-loop controller 5 ms at 50 Hz...
Page 531 6ES5 712-8AF00 - Cable connector (2.5 m/8.2 ft.) 6ES5 712-8BC50 - Cable connector (5.0 m/16.4 ft.) 6ES5 712-8BF00 - Cable connector SIEMENS (10 m/33 ft.) 6ES5 712-8CB00 SIMATIC S5 INTERFACE MODULE Cable insulation in ducts permissible 6ES5 316-8MA12 Permissible potential...
Page 532 Bus Unit (SIGUT) (6ES5 700-8MA11) Technical Specifications Type of connection SIGUT screw-type terminals Number of plug-in modules Number of bus units per programmable SIEMENS controller max. Connection between two bus units flat ribbon Number of terminals 10 per slot Rated insulation voltage...
Page 533 Bus Unit (Crimp-Snap-In Connections) (6ES5 700-8MA21) Technical Specifications Type of connection Crimp snap-in Number of plug-in modules Number of bus units per programmable SIEMENS controller max. Connection between two bus units flat ribbon Number of terminals 10 per slot Conductor cross...
Page 534 Dimension Drawings S5-95F Programmable Controller ......B - 1 Bus Units ......... B - 2 Interface Modules .
Page 535 Figures Dimension Drawing of the S5-95F ......B - 1 Dimension Drawing of the Bus Unit (Crimp Snap-in Connections) with I/O Module .
Page 536: B Dimension Drawings
S5-95F Dimension Drawings Dimension Drawings S5-95F Programmable Controller 145 (5.7) 135 (5.3) (3.2) (0.5) 126 (5) approx. 40 146 (5.8) (3.2) Figure B-1. Dimension Drawing of the S5-95F EWA 4NEB 812 6210-02...
Page 537: B.2 Bus Units
Dimension Drawing S5-95F Bus Units 135 (5.3) 85 (3.4) 81 (3.2) 135 (5.3) with crimp snap-in connection (6ES5 700-8MA21) Standard mounting rail EN 50022-35×15 91.5 (3.6) 45.75 (1.8) Figure B-2. Dimension Drawing of the Bus Unit (Crimp Snap-in Connections) with I/O Module EWA 4NEB 812 6210-02...
Page 538 S5-95F Dimension Drawing 135 (5.3) 85 (3.4) 127 (5) 81 (3.2) 162 (6.4) with screw-type terminals (6ES5 700-8MA11) Standard mounting rail EN 50022-35×15 91.5 (3.6) 45.75 (1.7) Figure B-3. Dimension Drawing of the Bus Unit (SIGUT Screw-type Terminals) with I/O Module EWA 4NEB 812 6210-02...
Page 539: B.3 Interface Modules
Dimension Drawings S5-95F Interface Modules (5.3) min. 210 (8.3) max. 570 (22.4) 81 (3.2) (5.3) 13.5 (0.5) 45.4 26 (1) (1.8) 35 (1.4) Figure B-4. Dimension Drawing of the IM 315 Interface Module EWA 4NEB 812 6210-02...
Page 540 S5-95F Dimension Drawings 45.4 (1.8) min. 210 (8.3) max. 10000 (39.4) (3.2) 135 (5.3) 13.5 (0.5) 26 (1) 35 (1.4) Figure B-5. Dimension Drawing of the IM 316 Interface Module (6ES5 316-8MA12) EWA 4NEB 812 6210-02...
Page 541: B.4 Standard Mounting Rails
Dimension Drawings S5-95F Standard Mounting Rails 15° 15° Deburred Deburred 2.5 (0.1) 2.5 (0.1) R 1.2 (0.05) R 1.2 (0.05) R 1.2 (0.05) R 1.2 (0.05) Centerline for oblong hole 19 (0.8) 19 (0.8) 24 (1.0) 24 (1.0) 35 (1.4) 35 (1.4) burred oblong...
Page 542 S5-95F Dimension Drawings 15 (0.6) 20 x 25=500 (0.8 x 1.0=19.7) 25 (1.0) 5.2 (0.2) 18 (0.7) 530 (20.9) Figure B-8. Dimension Drawing of the 530-mm (20.9-in.) Standard Mounting Rail 15 (0.6) 32 x 25=800 (1.26 x 1.0=31.5) 25 (1.0) 5.2 (0.2) 18 (0.7) 830 (32.7)
Page 543 Operations List Operations List ........C - 1 C.1.1 Basic Operations .
Page 544: C Operations List
S5-95F Operations List Operations List Operations List The following tables list the typical execution times for the individual operations. If you wish to calculate the runtime of a program part, then you must add synchronization times to the typical execution time. After an execution time of approx. 5 ms each, the S5-95F compiler initiates a synchronization call for the synchronization of the two subunits.
Page 545 Operations List S5-95F for organization blocks (OB) for function blocks (FB) for program blocks (PB) for sequence blocks (SB) Typical 1 RLO depend. Execution time 2 RLO affected Opera- Permissible in µs 3 RLO reloaded Function tion Operands Ext. (STL) board Set / Reset Operations I, Q...
Page 546 S5-95F Operations List for organization blocks (OB) for function blocks (FB) for program blocks (PB) for sequence blocks (SB) Typical 1 RLO depend. Execution Time 2 RLO affected Oper- Permissible in µs 3 RLO reloaded Function ation Operands Ext. (STL) board Load Operations (cont.) Load a data word of the current data block into ACCU 1:...
Page 547 Operations List S5-95F for organization blocks (OB) for function blocks (FB) for program blocks (PB) for sequence blocks (SB) Typical 1 RLO depend. Execution Time 2 RLO affected Oper- Permissible in µs 3 RLO reloaded Function ation Operands Ext. (STL) board Transfer Operations (cont.) PY0 to 31...
Page 548 S5-95F Operations List for organization blocks (OB) for function blocks (FB) for program blocks (PB) for sequence blocks (SB) Typical 1 RLO depend. Execution Time 2 RLO affected Oper- Permissible in µs 3 RLO reloaded Function ation Operands Ext. (STL) board Counter Operations Counter counts up 1...
Page 549 Operations List S5-95F for organization blocks (OB) for function blocks (FB) for program blocks (PB) for sequence blocks (SB) Typical 1 RLO depend. Execution Time 2 RLO affected Oper- Permissible in µs 3 RLO reloaded Function ation Operands Ext. (STL) board Block Call Operations Jump unconditionally to a program block.
Page 550: C.1.2 Supplementary Operations
S5-95F Operations List C.1.2 Supplementary Operations for organization blocks (OB) for function blocks (FB) for program blocks (PB) for sequence blocks (SB) Typical 1 RLO depend. Execution Time 2 RLO affected Oper- Permisible in µs 3 RLO reloaded Function ation Operands Ext.
Page 551 Operations List S5-95F for organization blocks (OB) for function blocks (FB) for program blocks (PB) for sequence blocks (SB) Typical 1 RLO depend. Execution Time 2 RLO affected Oper- Permissible in µs 3 RLO reloaded Function ation Operands Ext. (STL) board Bit Operations T0 to 63...
Page 552 S5-95F Operations List for organization blocks (OB) for function blocks (FB) for program blocks (PB) for sequence blocks (SB) Typical 1 RLO depend. Execution Time 2 RLO affected Oper- Permissible in µs 3 RLO reloaded Function ation Operands Ext. (STL) board Timer and Counter Operations (cont.) Formal operand...
Page 553 Operations List S5-95F for organization blocks (OB) for function blocks (FB) for program blocks (PB) for sequence blocks (SB) Typical 1 RLO depend. Execution Time 2 RLO affected Oper- Permissible in µs 3 RLO reloaded Function ation Operands Ext. (STL) board Load and Transfer Operations (cont.) Formal operand...
Page 554 S5-95F Operations List for organization blocks (OB) for function blocks (FB) for program blocks (PB) for sequence blocks (SB) Typical 1 RLO depend. Execution Time 2 RLO affected Oper- Permissible in µs 3 RLO reloaded Function ation Operands Ext. (STL) board Other Operations Disable interrupt.
Page 555: C.1.3 System Operations
Operations List S5-95F C 1.3 System Operations Typical 1 RLO depend. Execution Time 2 RLO affected Oper- Permissible in µs 3 RLO reloaded Function ation Operands Ext. (STL) board Set Operations Set bit in system data area unconditionally. Reset bit in system data area unconditionally. Load and Transfer Operations Load the contents of a memory word (addressed by ACCU 1) indirectly into the register (0: ACCU 1;...
Page 556: C.2 Machine Code Listing
S5-95F Operations List Machine Code Listing Machine Code Machine Code Oper- Oper- Oper- Oper- ation ation NOP 0 SEC= >F <F ><F >=F <=F SSU= SFD= C-13 EWA 4NEB 812 6210-02...
Page 557 Operations List S5-95F Machine Code Machine Code Oper- Oper- Oper- Oper- ation ation C-14 EWA 4NEB 812 6210-02...
Page 558 S5-95F Operations List Machine Code Machine Code Opera- Oper- Opera- Oper- tion tion PB/PY PB/PY NOP 1 * depending on the type of programmer used Explanation of the Indices + byte address + number of shifts + bit address + relative jump address + parameter address + register address + time number...
Page 559: C.3 List Of Abbreviations
Operations List S5-95F List of Abbreviations Permissible Operand Value Range for Abbreviation Explanation S5-95F ACCU 1 Accumulator 1 (When accumulator 1 is loaded, any existing contents are shifted into accumulator 2.) ACCU 2 Accumulator 2 Byte constant (fixed-point number) (- 127 to +127) Counter - retentive (0 to 7)
Page 560 S5-95F Operations List Permissible Operand Value Range for Abbreviation Explanation S5-95F Flag word - retentive (0 to 62) - non-retentive (64 to 254) Input (0.0 to 127.7) Input byte (0 to 127) DB1 parameter: activate interrupt on negative and positive edge DB1 parameter: activate interrupt on positive edge DB1 parameter: activate interrupt on positive and negative edge...
Page 561 Operations List S5-95F Permissible Operand Value Range for Abbreviation Explanation S5-95F PB or PY Peripheral byte (0 to 127) (depending on type of program- mer used) Programmer DB1 parameter: SINEC L1, programmer bus number Process image input table Process image output table Peripheral word (0 to 126) Output...
Page 562 Guidelines for Handling Electrostatic Sensitive Devices (ESD) EWA 4NEB 812 6210-02...
Page 563 Figures ESD Measures ......... . . D - 4 EWA 4NEB 812 6210-02...
Page 564 S5-95F Guidelines for Handling Electrostatic Sensitive Devices (ESD) Guidelines for Handling Electrostatic Sensitive Devices (ESD) What is ESD? All electronic modules are equipped with large-scale integrated ICs or components. Due to their design, these electronic elements are very sensitive to overvoltages and thus to any electrostatic discharge.
Page 565 Guidelines for Handling Electrostatic Sensitive Devices (ESD) S5-95F Electrostatic charging of objects and persons Every object with no conductive connection to the electrical potential of its surroundings can be charged electrostatically. In this way, voltages up to 15000 V can build up whereas minor charges, i.e.
Page 566 S5-95F Guidelines for Handling Electrostatic Sensitive Devices (ESD) Additional precautions for modules without housings Note the following measures that have to be taken for modules that are not protected against accidental contact: • Touch electrostatical sensitive devices only - if you wear a wristband complying with ESD specifications or - if you use special ESD footwear or ground straps when walking on an ESD floor.
Page 567 Guidelines for Handling Electrostatic Sensitive Devices (ESD) S5-95F The following Figure once again illustrates the precautions for handling electrostatically sensitive devices. Conductive flooring material Table with conductive, grounded surface ESD footwear ESD smock Grounded ESD wristband Ground connection of switchgear cabinet Grounded chair Figure D-1.
Page 568 Prototype Test Certification EWA 4NEB 812 6210-02...
Page 569 Industrial Safety of the Statutory Industrial Accident Insurance Institution (BIA). Copies of the report and the certificates issued in connection with the prototype tests can be obtained from us on request. Please direct inquiries to: Siemens AG AUT 125 attn. Mrs. Bleicher P.O.
Page 570 Index EWA 4NEB 812 6210-02...
Page 571 S5-95F Index Index Battery AC power cable - replacement 2-19, 18-13 Acceptance 18-1 Binary scaler 8-70 Acceptance - test 18-5 - address Access Blanking time 4-17 - to the process image 6-10f Block Accident prevention - address list 6-17 - rules - call 7-11, 7-17, 8-34 Accumulator...
Page 572 Index S5-95F Checklist Coupling - for EMC installation 3-13 - element 4-17f Circuit diagrams 18-7 - path Circulating current 3-10 Coupling relay 4-17f, 18-8f, Clock 10-1ff 18-15 - data 2-18, 7-18, 10-2ff - connection 5-16f - data area 6-18 CP 521 18-3 - parameters 10-2...
Page 573 S5-95F Index Diagnostic byte 2-4, 6-8f, 6-16, Expansion 12-3, 12-5f, 12-11 - tier - for battery and load voltage 15-22 External I/O module Digital module - connection 5-1, 5-5, 5-13ff - addressing 6-4f External power supply unit - connection 5-19, 5-25f Digital outputs - testing with FB252 4-17...
Page 574 Index S5-95F Heat Jump - dissipation 5-6, 5-8 - displacement 8-56 Height 5-10 - operation 7-5, 7-21, 8-55f Hydraulic lifting device 17-1 KBE Coordination byte I/O areas KBS Coordination byte - in the process image I/O bus - mode of operation 2-8f LAD Ladder Diagram I/O module...
Page 575 S5-95F Index PID controller 9-3ff OB13 - mode 9-10 - call-up interval 7-25f - parameters Old value 15-1 - sampling interval ON/OFF switch 2-1, 2-11 PII Process image Onboard counter inputs PIQ Process image - connection 4-19 Planning phase 18-2f Onboard digital input Polling - connection...
Page 576 Index S5-95F Quality level 1-1, 1-3 Safety Quasi-safety mode 2-16 - class Quenching element 3-11 - regulations - mode 2-13, 2-17, 7-1, 7-16ff, 7-30, Rack 15-19 - mounting Safety time 13-14 Receive - SINEC L1 13-11f, 18-37ff - coordination 13-21 Scratchpad 18-27 - data...
Page 577 S5-95F Index Standard mounting rail 2-2, 4-2ff, 5-1f Time Standard value - control - formation 15-19, 18-20 - stamp 10-14 Start operation 2-13, 2-17, 7-18ff, Time interrupt 8-40 - processing 7-25ff Startup Timer - block 7-19 - area 8-13f - procedures - off-delay 8-15, 8-24 Statement list (STL)
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Siemens SIMATIC S5-95F Manual

Introduction

1 S5-95F Failsafe Mini PLC

2 Design, Functions and Operation

3 Guidelines for the Planning and Installation of the Product

4 Installing and Connecting the Basic System

5 Expansion of Basic System with External I/Os

6 Addressing

7 Introduction to STEP 5

8 STEP 5 Operations

Blocks and Their Functions

10 The Integral Real-Time Clock

11 Analog Value Processing

12 Interrupt Processing

13 S5-95F on SINEC L1

14 Testing the User Program and Storing It on the Memory Submodule

15 Error Diagnosis and Elimination

16 Differences between the S5-95U and the S5-95F

17 Application

18 Rules for Failsafe Operation of an S5-95F

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Summary of Contents for Siemens SIMATIC S5-95F