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S5-115U Manual
Stored On-Delay and Reset
Example:
Output Q 4.3 is set 5 sec. after I 3.3.
Further changes in the signal state at input I 3.3 do not affect the output.
Input I 3.2 resets timer T 4 to its initial value and sets output Q 4.3 to zero.
Timing Diagram
Signal states
1
0
1
0
1
0
5
STL
A
I
3.3
L
KT
50.1
SS
T
4
I 3.3
A
I
3.2
KT 50.1
R
T
4
NOP 0
NOP 0
A
T
4
=
Q
4.3
Note
The time values are unsharp at the height of the timebase. The retentive ON delay can
be retriggered.
EWA 4NEB 811 6130-02b
I 3.3
I 3.2
Q 4.3
Time
in sec.
5
CSF
T 4
T
S
TV
BI
DE
I 3.2
R
Q
Q 4.3
STEP 5 Operations
Circuit Diagram
I 3.2
I 3.3
H 1
T 4
Q 4.3
H 1: Auxiliary relay
LAD
T 4
I 3.3
T
S
KT 50.1
TV
BI
DE
I 3.2
R
Q
H 1
H 1
Q 4.3
8-23
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