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S5-115U Manual
6.3.2
Accessing the PIQ
New signal states are entered in the PIQ during program scanning. This information is transferred
to the output modules at the end of each program scan.
Writing bit by bit
in binary operations:
Writing byte by byte
to transfer from ACCUM 1:
ACCUM 1
Writing word by word
to transfer from ACCUM 1:
ACCUM 1
On all CPUs, output of the PIQ to the output modules can be inhibited by setting bit 2 in system
data word SD 120 (EA70
H
Bit 2="1":
Bit 2="0":
The default setting is bit 2="0" (output of the PIQ enabled).
Note
System data word SD 120 can be modified over the programmer function DISPL. ADDR.
only when the PLC is in the STOP mode!
EWA 4NEB 811 6130-02b
=Q 4.6
T QB 36
15
High-Order
Low-Order
Byte
Byte
(Value 00
)
H
T QW 52
15
High-Order
Low-Order
Byte
Byte
Figure 6-9. Accessing the PIQ
).
Output of the PIQ is inhibited.
Output of the PIQ is enabled.
Addressing/Address Assignments
PIQ
Bit No.
7 6 5 4 3 2 1 0
Byte 4
Byte 36
0
Byte 52
Byte 53
0
6-9
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