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Technical Description
CPU 943
The CPU 943 contains an application-
specific integrated circuit (ASIC) and a
microprocessor.
The
handles all programmer interface mo-
dule
functions,
processes
and substitution operations and con-
trols the S5 bus. The microprocessor al-
so controls the ASIC that handles high-
speed processing of STEP 5 operations.
Besides the operating system memory,
the CPU 943 also has an internal RAM
(48 Kbytes) that can be used to store
the control program.
The contents of memory submodules
are copied to the internal RAM after
POWER UP and after overall reset.
The CPU 943 can also be ordered with
two interfaces. The second interface is
controlled by a further microprocessor
with its own operating system. This
operating sytem is also stored in the
operating system memory for the CPU.
Programmers, operator panels (OPs)
and SINEC L1 can be connected to the
second interface; point-to-point con-
nection via the SINEC L1 protocol is al-
so possible. The CPU 943 operating sy-
stem also supports the following addi-
tional functions:
•
ASCII driver for data interchange
over the second interface and for
connecting peripheral devices (e.g.
printers)
•
Integral real-time clock.
2-10
microprocessor
Memory
submodule
interrupts
Pro-
grammer
OP
Figure 2-5. Schematic Representation of CPU 943
Operating
system memory
64 Kbytes for
- CPU
- 2nd serial in-
terface
Control
panel
Microprocessor
ASIC
- processes bit
- processes some
and some word
word operations
operations
- controls bus
- processes times
- handles 1st serial
- monitors scan
interface
time
Micropro-
cessor for
2nd serial
interface
S5-115U Manual
Internal
RAM
48 Kbytes
Controller
for
I/O
S5 bus
modules
Operating
system
memory
32 Kbytes
Clock
EWA 4NEB 811 6130-02b
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