Intel Cyclone 10 GX FPGA User Manual page 38

• Hardware Configuration mode is "SGMII without Clock with SGMII Auto-Neg to
copper"
• Energy detect is disabled
• Diasble crsoover
• PAUSE is disabled
The registers of the Marvell 88E1111 device can be changed with MDC/MDIO. The
MDC/MDIO is connected to the FPGA device through a level translator.
2
4.9.7 I C/PMBUS
The power and various peripherals are managed by I
2
I C bus is shown in the figure below.
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Intel Cyclone 10 GX FPGA Development Kit User Guide
38
4 Development Board Components
UG-20105 | 2017.12.18
2
C/PMBUS. The topology of the