Intel Cyclone 10 GX FPGA User Manual page 11

3 Development Kit Setup
UG-20105 | 2017.12.18
Board Label
S6
S9
S15
Switch
S5.2
S6.1
S6.2
S9.1
S9.2
S15.1
S15.2
Default Position
OPEN/OFF/1
OPEN/OFF/1
OPEN/OFF/1
OPEN/OFF/1
OPEN/OFF/1
OPEN/OFF/1
OPEN/OFF/1
® ®
Intel Cyclone 10 GX FPGA Development Kit User Guide
Function
Enable Intel Cyclone 10 GX
FPGA JTAG
Reserved, no function
defined
Reserved, no function
defined
User available Digital Input 0
User available Digital Input 1
User available Digital Input 2
User available Digital Input 3
11